netdev - [PATCH 2/3] net: dsa: microchip: lan937x: force RGMII interface into PHY mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20240403180226.1641383-2-l.stach@pengutronix.de>
Date: Wed,  3 Apr 2024 20:02:25 +0200
From: Lucas Stach <l.stach@...gutronix.de>
To: Woojung Huh <woojung.huh@...rochip.com>,
	UNGLinuxDriver@...rochip.com,
	Andrew Lunn <andrew@...n.ch>,
	Florian Fainelli <f.fainelli@...il.com>,
	Vladimir Oltean <olteanv@...il.com>
Cc: netdev@...r.kernel.org,
	kernel@...gutronix.de,
	patchwork-lst@...gutronix.de
Subject: [PATCH 2/3] net: dsa: microchip: lan937x: force RGMII interface into PHY mode

The register manual and datasheet documentation for the LAN937x series
disagree about the polarity of the MII mode strap. As a consequence
there are hardware designs that have the RGMII interface strapped into
MAC mode, which is a invalid configuration and will prevent the internal
clock from being fed into the port TX interface.

Force the MII mode to PHY for RGMII interfaces where this is the only
valid mode, to override the inproper strapping.

Signed-off-by: Lucas Stach <l.stach@...gutronix.de>
---
 drivers/net/dsa/microchip/lan937x_main.c | 11 +++++++++++
 drivers/net/dsa/microchip/lan937x_reg.h  |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c
index 6a20cbacc513..04fa74c7dcbe 100644
--- a/drivers/net/dsa/microchip/lan937x_main.c
+++ b/drivers/net/dsa/microchip/lan937x_main.c
@@ -217,6 +217,17 @@ void lan937x_config_cpu_port(struct dsa_switch *ds)
 		if (dev->info->cpu_ports & (1 << dp->index)) {
 			dev->cpu_port = dp->index;
 
+			/*
+			 * Force RGMII interface into PHY mode, as that's the
+			 * only valid mode, but it may be in MAC mode due to
+			 * incorrect strapping.
+			 */
+			if (phy_interface_mode_is_rgmii(dev->ports[dp->index].interface)) {
+				lan937x_port_cfg(dev, dp->index,
+						 REG_PORT_XMII_CTRL_1,
+						 PORT_MII_MODE_MAC, false);
+			}
+
 			/* enable cpu port */
 			lan937x_port_setup(dev, dp->index, true);
 		}
diff --git a/drivers/net/dsa/microchip/lan937x_reg.h b/drivers/net/dsa/microchip/lan937x_reg.h
index 7ecada924023..e36bcb155f54 100644
--- a/drivers/net/dsa/microchip/lan937x_reg.h
+++ b/drivers/net/dsa/microchip/lan937x_reg.h
@@ -150,6 +150,9 @@
 #define REG_PORT_TX_PHY_CTRL_BASE	0x0280
 
 /* 3 - xMII */
+#define REG_PORT_XMII_CTRL_1		0x0301
+#define PORT_MII_MODE_MAC		BIT(2)
+
 #define PORT_SGMII_SEL			BIT(7)
 #define PORT_GRXC_ENABLE		BIT(0)
 
-- 
2.39.2