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Message-ID:
 <LV3P220MB12026032F3316F557415AD9FA0192@LV3P220MB1202.NAMP220.PROD.OUTLOOK.COM>
Date: Wed,  1 May 2024 12:03:19 -0400
From: Min Li <lnimi@...mail.com>
To: richardcochran@...il.com,
	lee@...nel.org
Cc: linux-kernel@...r.kernel.org,
	netdev@...r.kernel.org,
	Min Li <min.li.xe@...esas.com>
Subject: [PATCH net-next v7 0/5] ptp: clockmatrix: support 32-bit address space 

From: Min Li <min.li.xe@...esas.com>

The main porpose of this series is [PATCH 1/5], which is to support read/write
to the whole 32-bit address space. Other changes are increamental since
[PATCH 1/5].
 

Min Li (5):
  ptp: clockmatrix: support 32-bit address space
  ptp: clockmatrix: set write phase timer to 0 when not in PCW mode
  ptp: clockmatrix: dco input-to-output delay is 20 FOD cycles + 8ns
  ptp: clockmatrix: Fix caps.max_adj to reflect
    DPLL_MAX_FREQ_OFFSET[MAX_FFO]
  ptp: clockmatrix: move register and firmware related definition to
    idt8a340_reg.h

 drivers/ptp/ptp_clockmatrix.c    | 120 ++++--
 drivers/ptp/ptp_clockmatrix.h    |  66 +--
 include/linux/mfd/idt8a340_reg.h | 664 ++++++++++++++++++-------------
 3 files changed, 482 insertions(+), 368 deletions(-)

-- 
2.39.2


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