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Message-ID: <20240513145049.25695b4a@bootlin.com>
Date: Mon, 13 May 2024 14:50:49 +0200
From: Herve Codina <herve.codina@...tlin.com>
To: <Steen.Hegelund@...rochip.com>
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Subject: Re: [PATCH 12/17] irqchip: Add support for LAN966x OIC
Hi Steen,
On Wed, 8 May 2024 08:08:30 +0000
<Steen.Hegelund@...rochip.com> wrote:
...
> > +/* Mapping of source to destination interrupts (_n = 0..8) */
>
> Are the indices really needed on LAN966X_OIC_DST_INTR_MAP* and _IDENT*
> You do not appear to be using them?
>
>
> > +#define LAN966X_OIC_DST_INTR_MAP(_n) 0x78
Indeed, I missed them.
These registers are defined from 0 to 8 in the document:
https://microchip-ung.github.io/lan9662_reginfo/reginfo_LAN9662.html?select=cpu,intr
The code use only the indice 0.
In the next iteration, I will keep indices and update the definition of
registers like that:
#define LAN966X_OIC_DST_INTR_MAP(_n) (0x78 + (_n) * 4)
Best regards
Hervé
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