netdev - Re: [PATCH 09/17] dt-bindings: interrupt-controller: Add support for Microchip LAN966x OIC

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Message-ID: <20240513190457.43318788@bootlin.com>
Date: Mon, 13 May 2024 19:04:57 +0200
From: Herve Codina <herve.codina@...tlin.com>
To: Rob Herring <robh@...nel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>, Krzysztof Kozlowski
 <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
 <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Lee Jones
 <lee@...nel.org>, Arnd Bergmann <arnd@...db.de>, Horatiu Vultur
 <horatiu.vultur@...rochip.com>, UNGLinuxDriver@...rochip.com, Andrew Lunn
 <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>, Russell King
 <linux@...linux.org.uk>, Saravana Kannan <saravanak@...gle.com>, Bjorn
 Helgaas <bhelgaas@...gle.com>, Philipp Zabel <p.zabel@...gutronix.de>, Lars
 Povlsen <lars.povlsen@...rochip.com>, Steen Hegelund
 <Steen.Hegelund@...rochip.com>, Daniel Machon
 <daniel.machon@...rochip.com>, Alexandre Belloni
 <alexandre.belloni@...tlin.com>, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org, netdev@...r.kernel.org,
 linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, Allan
 Nielsen <allan.nielsen@...rochip.com>, Luca Ceresoli
 <luca.ceresoli@...tlin.com>, Thomas Petazzoni
 <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 09/17] dt-bindings: interrupt-controller: Add support
 for Microchip LAN966x OIC

Hi Rob,

On Mon, 13 May 2024 09:53:58 -0500
Rob Herring <robh@...nel.org> wrote:

> On Mon, May 13, 2024 at 02:37:20PM +0200, Herve Codina wrote:
> > Hi Rob,
> > 
> > On Tue, 7 May 2024 10:28:06 -0500
> > Rob Herring <robh@...nel.org> wrote:
> > 
> > ...  
> > > > +examples:
> > > > +  - |
> > > > +    interrupt-controller@...c0120 {
> > > > +        compatible = "microchip,lan966x-oic";
> > > > +        reg = <0xe00c0120 0x190>;    
> > > 
> > > Looks like this is part of some larger block?
> > >   
> > 
> > According to the registers information document:
> >   https://microchip-ung.github.io/lan9662_reginfo/reginfo_LAN9662.html?select=cpu,intr
> > 
> > The interrupt controller is mapped at offset 0x48 (offset in number of
> > 32bit words).  
> > -> Address offset: 0x48 * 4 = 0x120
> > -> size: (0x63 + 1) *  4 = 0x190  
> > 
> > IMHO, the reg property value looks correct.  
> 
> What I mean is h/w blocks don't just start at some address with small 
> alignment. That wouldn't work from a physical design standpoint. The 
> larger block here is "CPU System Regs". The block as a whole should be 
> documented, but maybe that ship already sailed.

The clock controller, also part of the "CPU System Regs" is already defined
and used without the larger block
  Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml

IMHO, the binding related to the interrupt controller should be consistent
with the one related to the clock controller.

> 
> Also, here you call it the OIC, but the link above calls it the VCore 
> interrupt controller.

Yes, I call it OIC (Outband Interrupt Controller) as it is its name in the
datasheet explaining how it works.
The datasheet I have is not publicly available and so, I can point only to
the register map (url provided).

I think it would be better to keep "Outband Interrupt Controller" as
mentioned in the datasheet.

Best regards,
Hervé

-- 
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com