netdev - Re: [PATCH net-next] net: ethernet: mtk_wed: add support for devices with more than 4GB of dram

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Message-ID: <ZlhSn8Z6E2Dc1khG@makrotopia.org>
Date: Thu, 30 May 2024 11:19:11 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: Lorenzo Bianconi <lorenzo@...nel.org>
Cc: netdev@...r.kernel.org, nbd@....name, john@...ozen.org,
	sean.wang@...iatek.com, Mark-MC.Lee@...iatek.com,
	davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, lorenzo.bianconi@...hat.com,
	sujuan.chen@...iatek.com, Elad Yifee <eladwf@...il.com>
Subject: Re: [PATCH net-next] net: ethernet: mtk_wed: add support for devices
 with more than 4GB of dram

Hi!

On Fri, Nov 17, 2023 at 05:42:59PM +0100, Lorenzo Bianconi wrote:
> Introduce WED offloading support for boards with more than 4GB of
> memory.
> 
> [...]

> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> index 3cf6589cfdac..a6e91573f8da 100644
> --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> @@ -1159,15 +1159,18 @@ static int mtk_init_fq_dma(struct mtk_eth *eth)
>  	phy_ring_tail = eth->phy_scratch_ring + soc->txrx.txd_size * (cnt - 1);
>  
>  	for (i = 0; i < cnt; i++) {
> +		dma_addr_t addr = dma_addr + i * MTK_QDMA_PAGE_SIZE;
>  		struct mtk_tx_dma_v2 *txd;
>  
>  		txd = eth->scratch_ring + i * soc->txrx.txd_size;
> -		txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
> +		txd->txd1 = addr;
>  		if (i < cnt - 1)
>  			txd->txd2 = eth->phy_scratch_ring +
>  				    (i + 1) * soc->txrx.txd_size;
>  
>  		txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
> +		if (MTK_HAS_CAPS(soc->caps, MTK_36BIT_DMA))
> +			txd->txd3 |= TX_DMA_PREP_ADDR64(addr);
>  		txd->txd4 = 0;
>  		if (mtk_is_netsys_v2_or_greater(eth)) {
>  			txd->txd5 = 0;

The above part of the patch should also be applied to 'net' tree as fix
for commit 2d75891ebc09 ("net: ethernet: mtk_eth_soc: support 36-bit DMA
addressing on MT7988").

It should have probably been a separate commit in first place, but it is
how it is now and I'm glad that it fixes the remaining issues on devices
devices with 4 GiB of RAM or more (and hence exceeding the 32-bit
addressing range given that DRAM starts at 0x40000000; the commit
message here states that only boards with more than 4 GiB are affected,
but in reality it's boards with more then 3 GiB because of the DRAM
start offset).

Reported-by: Elad Yifee <eladwf@...il.com>