netdev - Re: [PATCH net-next v5 07/14] net: phy: microchip_t1s: add c45 direct access in LAN865x internal PHY

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Message-ID: <c8ec015b-2e25-49c9-a404-820545992909@lunn.ch>
Date: Sun, 11 Aug 2024 17:48:30 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
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Subject: Re: [PATCH net-next v5 07/14] net: phy: microchip_t1s: add c45
 direct access in LAN865x internal PHY

On Tue, Jul 30, 2024 at 09:38:59AM +0530, Parthiban Veerasooran wrote:
> This patch adds c45 registers direct access support in Microchip's
> LAN865x internal PHY.
> 
> OPEN Alliance 10BASE-T1x compliance MAC-PHYs will have both C22 and C45
> registers space. If the PHY is discovered via C22 bus protocol it assumes
> it uses C22 protocol and always uses C22 registers indirect access to
> access C45 registers. This is because, we don't have a clean separation
> between C22/C45 register space and C22/C45 MDIO bus protocols. Resulting,
> PHY C45 registers direct access can't be used which can save multiple SPI
> bus access. To support this feature, set .read_mmd/.write_mmd in the PHY
> driver to call .read_c45/.write_c45 in the OPEN Alliance framework
> drivers/net/ethernet/oa_tc6.c
> 
> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew