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Message-ID: <55ff5570-5398-48e9-bf56-d34da197d175@lunn.ch>
Date: Mon, 26 Aug 2024 04:33:51 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Jiawen Wu <jiawenwu@...stnetic.com>
Cc: andi.shyti@...nel.org, jarkko.nikula@...ux.intel.com,
andriy.shevchenko@...ux.intel.com, mika.westerberg@...ux.intel.com,
jsd@...ihalf.com, davem@...emloft.net, edumazet@...gle.com,
kuba@...nel.org, pabeni@...hat.com, rmk+kernel@...linux.org.uk,
piotr.raczynski@...el.com, linux-i2c@...r.kernel.org,
netdev@...r.kernel.org, mengyuanlou@...-swift.com,
duanqiangwen@...-swift.com
Subject: Re: [PATCH net 0/3] Add I2C bus lock for Wangxun
On Mon, Aug 26, 2024 at 10:04:42AM +0800, Jiawen Wu wrote:
> On Mon, Aug 26, 2024 9:33 AM, Andrew Lunn wrote:
> > On Fri, Aug 23, 2024 at 11:02:39AM +0800, Jiawen Wu wrote:
> > > Sometimes the driver can not get the SFP information because the I2C bus
> > > is accessed by the firmware at the same time.
> >
> > Please could you explain this some more. What firmware?
>
> It's the firmware of our ethernet devices.
>
> > There some registers which are clear on read. They don't work when you
> > have multiple entities reading them.
>
> I'm not trying to multiple access the I2C registers, but these registers cannot
> be accessed by other interfaces in the process of reading complete information
> each time. So there is a semaphore needed that locks up the entire read process.
More details please.
Linux assume it is driving the hardware. Your firmware cannot be
touching any registers which will clear on read. QSFP states that
registers 3-31 of page 0 are all clear on read, for example. The
firmware should also not be setting any registers, otherwise you can
confuse Linux which assumes registers it set stay set, because it is
controlling the hardware.
Your firmware also needs to handle that Linux can change the page. If
the firmware changes the page, it must restore it back to whatever
page Linux selected, etc.
The fact you are submitting this for net suggests you have seen real
issues. Please describe what those issues are.
Andrew
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