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Message-ID: <20240906133951.3433788-2-niklas.soderlund+renesas@ragnatech.se>
Date: Fri, 6 Sep 2024 15:39:49 +0200
From: Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
To: Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Stefan Eichenberger <eichest@...il.com>,
Dimitri Fedrau <dima.fedrau@...il.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
netdev@...r.kernel.org
Cc: linux-renesas-soc@...r.kernel.org,
Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
Subject: [net-next 1/3] net: phy: marvell-88q2xxx: Align soft reset for mv88q2110 and mv88q2220
The soft reset implementations for mv88q2110 and mv88q2220 differ as the
later need to consider that auto negation is supported on mv88q2220
devices. In preparation of enabling auto negotiation on mv88q2110 merge
the two rest functions into a device generic one.
The mv88q2220 behavior is kept as is but extended to wait for the reset
bit to be clears before continuing, as was done previously on mv88q2220.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
---
drivers/net/phy/marvell-88q2xxx.c | 60 ++++++++++++++-----------------
1 file changed, 26 insertions(+), 34 deletions(-)
diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c
index c812f16eaa3a..850beb4b1722 100644
--- a/drivers/net/phy/marvell-88q2xxx.c
+++ b/drivers/net/phy/marvell-88q2xxx.c
@@ -179,15 +179,34 @@ static int mv88q2xxx_soft_reset(struct phy_device *phydev)
int ret;
int val;
- ret = phy_write_mmd(phydev, MDIO_MMD_PCS,
- MDIO_PCS_1000BT1_CTRL, MDIO_PCS_1000BT1_CTRL_RESET);
+ /* Enable RESET of DCL */
+ if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) {
+ ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x48);
+ if (ret < 0)
+ return ret;
+ }
+
+ ret = phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_CTRL,
+ MDIO_PCS_1000BT1_CTRL_RESET);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS,
+ MDIO_PCS_1000BT1_CTRL, val,
+ !(val & MDIO_PCS_1000BT1_CTRL_RESET),
+ 50000, 600000, true);
if (ret < 0)
return ret;
- return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS,
- MDIO_PCS_1000BT1_CTRL, val,
- !(val & MDIO_PCS_1000BT1_CTRL_RESET),
- 50000, 600000, true);
+ ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xffe4, 0xc);
+ if (ret < 0)
+ return ret;
+
+ /* Disable RESET of DCL */
+ if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000)
+ return phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x58);
+
+ return 0;
}
static int mv88q2xxx_read_link_gbit(struct phy_device *phydev)
@@ -705,33 +724,6 @@ static int mv88q2xxx_probe(struct phy_device *phydev)
return mv88q2xxx_hwmon_probe(phydev);
}
-static int mv88q222x_soft_reset(struct phy_device *phydev)
-{
- int ret;
-
- /* Enable RESET of DCL */
- if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) {
- ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x48);
- if (ret < 0)
- return ret;
- }
-
- ret = phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_CTRL,
- MDIO_PCS_1000BT1_CTRL_RESET);
- if (ret < 0)
- return ret;
-
- ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xffe4, 0xc);
- if (ret < 0)
- return ret;
-
- /* Disable RESET of DCL */
- if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000)
- return phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x58);
-
- return 0;
-}
-
static int mv88q222x_write_mmd_vals(struct phy_device *phydev,
const struct mmd_val *vals, size_t len)
{
@@ -906,7 +898,7 @@ static struct phy_driver mv88q2xxx_driver[] = {
.aneg_done = genphy_c45_aneg_done,
.config_init = mv88q222x_config_init,
.read_status = mv88q2xxx_read_status,
- .soft_reset = mv88q222x_soft_reset,
+ .soft_reset = mv88q2xxx_soft_reset,
.config_intr = mv88q2xxx_config_intr,
.handle_interrupt = mv88q2xxx_handle_interrupt,
.set_loopback = genphy_c45_loopback,
--
2.46.0
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