netdev - Re: [PATCH v4 07/26] sfc: use cxl api for regs setup and checking

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Message-ID: <4ce8cc04-71fd-424a-9831-86f89fcd7d2f@amd.com>
Date: Thu, 17 Oct 2024 16:49:26 -0500
From: Ben Cheatham <benjamin.cheatham@....com>
To: <alejandro.lucero-palau@....com>
CC: <linux-cxl@...r.kernel.org>, <netdev@...r.kernel.org>,
	<dan.j.williams@...el.com>, <martin.habets@...inx.com>,
	<edward.cree@....com>, <davem@...emloft.net>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <edumazet@...gle.com>
Subject: Re: [PATCH v4 07/26] sfc: use cxl api for regs setup and checking

On 10/17/24 11:52 AM, alejandro.lucero-palau@....com wrote:
> From: Alejandro Lucero <alucerop@....com>
> 
> Use cxl code for registers discovery and mapping.
> 
> Validate capabilities found based on those registers against expected
> capabilities.
> 
> Signed-off-by: Alejandro Lucero <alucerop@....com>
> ---
>  drivers/net/ethernet/sfc/efx_cxl.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> index fb3eef339b34..749aa97683fd 100644
> --- a/drivers/net/ethernet/sfc/efx_cxl.c
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -22,6 +22,8 @@ int efx_cxl_init(struct efx_nic *efx)
>  {
>  #if IS_ENABLED(CONFIG_CXL_BUS)
>  	struct pci_dev *pci_dev = efx->pci_dev;
> +	DECLARE_BITMAP(expected, CXL_MAX_CAPS);
> +	DECLARE_BITMAP(found, CXL_MAX_CAPS);
>  	struct efx_cxl *cxl;
>  	struct resource res;
>  	u16 dvsec;
> @@ -64,6 +66,23 @@ int efx_cxl_init(struct efx_nic *efx)
>  		goto err2;
>  	}
>  
> +	rc = cxl_pci_accel_setup_regs(pci_dev, cxl->cxlds);
> +	if (rc) {
> +		pci_err(pci_dev, "CXL accel setup regs failed");
> +		goto err2;
> +	}
> +
> +	bitmap_clear(expected, 0, BITS_PER_TYPE(unsigned long));

In some places you use BITS_PER_TYPE(unsigned long) for the size of the capabilities bitmap,
while in others you use CXL_MAX_CAPS. Right now it isn't an issue since CXL_MAX_CAPS is way
smaller than the size of an unsigned long, but I seem to remember Jonathan suggesting this
for future proofing. So, I would suggest setting CXL_MAX_CAPS = BITS_PER_TYPE(unsigned long)
and using CXL_MAX_CAPS everywhere (or just using CXL_MAX_CAPS as-is). Then, when/if there
are more capabilities we can just increase what CXL_MAX_CAPS is set to.

> +	bitmap_set(expected, CXL_DEV_CAP_HDM, 1);
> +	bitmap_set(expected, CXL_DEV_CAP_RAS, 1);
> +
> +	if (!cxl_pci_check_caps(cxl->cxlds, expected, found)) {
> +		pci_err(pci_dev,
> +			"CXL device capabilities found(%08lx) not as expected(%08lx)",
> +			*found, *expected);
> +		goto err2;
> +	}
> +
>  	efx->cxl = cxl;
>  #endif
>