netdev - Re: [PATCH net-next v2 1/2] bnxt_en: cache only 24 bits of hw counter

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Message-ID: <CACKFLikgQxsYQxkMZdXDusS=0=rZi8g9Fn6-nEnVw+g-hgzf4g@mail.gmail.com>
Date: Fri, 25 Oct 2024 14:31:37 -0700
From: Michael Chan <michael.chan@...adcom.com>
To: Vadim Fedorenko <vadfed@...a.com>
Cc: Vadim Fedorenko <vadim.fedorenko@...ux.dev>, Pavan Chebbi <pavan.chebbi@...adcom.com>, 
	Jakub Kicinski <kuba@...nel.org>, Andrew Lunn <andrew+netdev@...n.ch>, Paolo Abeni <pabeni@...hat.com>, 
	"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org, 
	Richard Cochran <richardcochran@...il.com>
Subject: Re: [PATCH net-next v2 1/2] bnxt_en: cache only 24 bits of hw counter

On Fri, Oct 25, 2024 at 12:48 PM Vadim Fedorenko <vadfed@...a.com> wrote:
>
> This hardware can provide only 48 bits of cycle counter. We can leave
> only 24 bits in the cache to extend RX timestamps from 32 bits to 48
> bits. This make cache writes atomic even on 32 bit platforms and we can
> simply use READ_ONCE()/WRITE_ONCE() pair and remove spinlock. The
> configuration structure will be also reduced by 4 bytes.

ptp->old_time serves 2 purposes: to cache the upper 16 bits of the HW
counter and for rollover check.  With this patch reducing
ptp->old_time to 24 bits, we now use the upper 16 bits for the cache
and the next 8 bits for the rollover check.  I think this will work.
But since the field is now 32-bit, why not use the full 32 bits
instead of 24 bits?  Thanks.

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