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Message-ID:
<SEYPR06MB51341859052E393D404F4E519D272@SEYPR06MB5134.apcprd06.prod.outlook.com>
Date: Mon, 18 Nov 2024 07:51:05 +0000
From: Jacky Chou <jacky_chou@...eedtech.com>
To: Arnd Bergmann <arnd@...db.de>, "andrew+netdev@...n.ch"
<andrew+netdev@...n.ch>, "David S . Miller" <davem@...emloft.net>, Eric
Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni
<pabeni@...hat.com>, Rob Herring <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Philipp Zabel
<p.zabel@...gutronix.de>, Netdev <netdev@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject:
回覆: [net-next v2 5/7] net: ftgmac100: add pin strap configuration for AST2700
Hi Arnd,
Thank you for your reply.
> > @@ -351,6 +352,10 @@ static void ftgmac100_start_hw(struct ftgmac100
> *priv)
> > if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
> > maccr |= FTGMAC100_MACCR_RM_VLAN;
> >
> > + if (of_device_is_compatible(priv->dev->of_node,
> > +"aspeed,ast2700-mac")
> > &&
> > + phydev && phydev->interface == PHY_INTERFACE_MODE_RMII)
> > + maccr |= FTGMAC100_MACCR_RMII_ENABLE;
> > +
> > /* Hit the HW */
>
> Is there a way to probe the presence of 64-bit addressing from hardware
> registers? That would be nicer than triggering it from the compatible string,
> given that any future SoC is likely also 64-bit.
There is no register indicated about 64-bit address support in the ftgmac100
of Aspeed 7th generation. Therefore, we use the compatible to configure pin strap
and DMA mask.
Thanks,
Jacky
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