netdev - Re: [PATCH v4 1/2] arm64: dts: qcom: qcs8300: add the first 2.5G ethernet

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Message-ID: <34ff9c8a-f288-4f76-be22-a1c784c24d2f@quicinc.com>
Date: Mon, 25 Nov 2024 11:22:02 +0800
From: Yijie Yang <quic_yijiyang@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Richard Cochran
	<richardcochran@...il.com>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>
Subject: Re: [PATCH v4 1/2] arm64: dts: qcom: qcs8300: add the first 2.5G
 ethernet



On 2024-11-24 03:36, Andrew Lunn wrote:
>> +		ethernet0: ethernet@...40000 {
>> +			compatible = "qcom,qcs8300-ethqos", "qcom,sa8775p-ethqos";
>> +			reg = <0x0 0x23040000 0x0 0x10000>,
>> +			      <0x0 0x23056000 0x0 0x100>;
>> +			reg-names = "stmmaceth", "rgmii";
> 
> Dumb question which should not stop this getting merged.
> 
> Since this is now a MAC using a SERDES, do you still need the rmgii
> registers? Can the silicon actually do RGMII?

Indeed, the RGMII configuration area is necessary for managing clock 
settings, even when SERDES is utilized. For instance, the 
RGMII_CONFIG2_RGMII_CLK_SEL_CFG bit within RGMII_IO_MACRO_CONFIG2 is set 
in ethqos_configure_sgmii.

> 
> 	Andrew

-- 
Best Regards,
Yijie