netdev - Re: [PATCH net-next v2] net: ethernet: ti: am65-cpsw: VLAN-aware CPSW only if !DSA

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Message-ID: <fgt5mqpmibxjbfd3ae46hxk3m2sowpbxs3ffurwxiqairvlj4d@7ns2gdwh3v7h>
Date: Fri, 10 Jan 2025 17:12:14 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: "A. Sverdlin" <alexander.sverdlin@...mens.com>
CC: <netdev@...r.kernel.org>, Siddharth Vadapalli <s-vadapalli@...com>,
        Andrew
 Lunn <andrew+netdev@...n.ch>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub
 Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
        Roger Quadros
	<rogerq@...nel.org>, Chintan Vankar <c-vankar@...com>,
        Julien Panis
	<jpanis@...libre.com>
Subject: Re: [PATCH net-next v2] net: ethernet: ti: am65-cpsw: VLAN-aware
 CPSW only if !DSA

On Fri, Jan 10, 2025 at 12:27:17PM +0100, A. Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@...mens.com>
> 
> Only configure VLAN-aware CPSW mode if no port is used as DSA CPU port.
> VLAN-aware mode interferes with some DSA tagging schemes and makes stacking
> DSA switches downstream of CPSW impossible. Previous attempts to address
> the issue linked below.
> 
> Link: https://lore.kernel.org/netdev/20240227082815.2073826-1-s-vadapalli@ti.com/
> Link: https://lore.kernel.org/linux-arm-kernel/4699400.vD3TdgH1nR@localhost/
> Co-developed-by: Siddharth Vadapalli <s-vadapalli@...com>

A Co-developed-by tag should be followed by a Signed-off-by tag of the
same individual.

> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@...mens.com>
> ---
> Changelog:
> v2: Thanks to Siddharth it does look much clearer now (conditionally clear
>     AM65_CPSW_CTL_VLAN_AWARE instead of setting)
> 
>  drivers/net/ethernet/ti/am65-cpsw-nuss.c | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> index 5465bf872734..58c840fb7e7e 100644
> --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> @@ -32,6 +32,7 @@
>  #include <linux/dma/ti-cppi5.h>
>  #include <linux/dma/k3-udma-glue.h>
>  #include <net/page_pool/helpers.h>
> +#include <net/dsa.h>
>  #include <net/switchdev.h>
>  
>  #include "cpsw_ale.h"
> @@ -724,13 +725,22 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)
>  	u32 val, port_mask;
>  	struct page *page;
>  
> +	/* Control register */
> +	val = AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE |
> +	      AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD;
> +	/* VLAN aware CPSW mode is incompatible with some DSA tagging schemes.
> +	 * Therefore disable VLAN_AWARE mode if any of the ports is a DSA Port.
> +	 */
> +	for (port_idx = 0; port_idx < common->port_num; port_idx++)
> +		if (netdev_uses_dsa(common->ports[port_idx].ndev)) {
> +			val &= ~AM65_CPSW_CTL_VLAN_AWARE;
> +			break;
> +		}
> +	writel(val, common->cpsw_base + AM65_CPSW_REG_CTL);
> +
>  	if (common->usage_count)
>  		return 0;

The changes above should be present HERE, i.e. below the
"common->usage_count" check, as was the case earlier.

>  
> -	/* Control register */
> -	writel(AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE |
> -	       AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD,
> -	       common->cpsw_base + AM65_CPSW_REG_CTL);
>  	/* Max length register */
>  	writel(AM65_CPSW_MAX_PACKET_SIZE,
>  	       host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);

Regards,
Siddharth.