netdev - Re: [net-next,PATCH 1/2] net: dsa: microchip: Add emulated MIIM access to switch LED config registers

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <19f854b1-f4bc-4912-a605-c2e74e39b4ea@denx.de>
Date: Mon, 20 Jan 2025 12:59:34 +0100
From: Marek Vasut <marex@...x.de>
To: Andrew Lunn <andrew@...n.ch>
Cc: netdev@...r.kernel.org, "David S. Miller" <davem@...emloft.net>,
 Eric Dumazet <edumazet@...gle.com>, Heiner Kallweit <hkallweit1@...il.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Russell King <linux@...linux.org.uk>, Tristram Ha
 <tristram.ha@...rochip.com>, UNGLinuxDriver@...rochip.com,
 Vladimir Oltean <olteanv@...il.com>, Woojung Huh
 <woojung.huh@...rochip.com>, linux-kernel@...r.kernel.org
Subject: Re: [net-next,PATCH 1/2] net: dsa: microchip: Add emulated MIIM
 access to switch LED config registers

On 1/16/25 2:06 PM, Andrew Lunn wrote:
>> This preparatory patch exposes the LED control bits in those Switch Config
>> Registers by mapping them at high addresses in the MIIM space, so the PHY
>> driver can access those registers and surely not collide with the existing
>> MIIM block registers. The two registers which are exposed are the global
>> Register 11 (0x0B): Global Control 9 as MIIM block register 0x0b00 and
>> port specific Register 29/45/61 (0x1D/0x2D/0x3D): Port 1/2/3 Control 10
>> as MIIM block register 0x0d00 . The access to those registers is further
>> restricted only to the LED configuration bits to prevent the PHY driver
>> or userspace tools like 'phytool' from tampering with any other switch
>> configuration through this interface.
> 
> I do wounder about using register numbers outside of the 0-31
> range. We never have enforced it, but these clearly break 802.3 C22.

Yes, I agree this is completely non-standard.

The registers I need to access from the PHY driver are neither C22 nor 
C45 registers , they are switch registers accessible directly via SPI 
only. I only needed some way to accesses them from the PHY driver to 
flip the LED bits.

> I wounder if it would be better to emulate pages as well. The PHY
> driver already has lanphy_write_page_reg() and
> lanphy_read_page_reg(). Could you emulate what those need?  It adds a
> lot of complexity, but it should be future proof.
> 
> What might be simpler is to expose an emulated C45 register range, and
> put the registers in the vendor section.
What would be the benefit of doing that, compared to the current 
approach? I think in either case, for example phytool could tamper with 
those registers anyway, right ?

Please note that the KSZ9xxx series to my knowledge do not have this PHY 
interface anymore, so that future proofing part is not really applicable 
I think.