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Message-ID: <091a2e9cc6fedd99f35da124f67a54b69478648f.camel@svanheule.net>
Date: Sun, 09 Feb 2025 15:19:29 +0100
From: Sander Vanheule <sander@...nheule.net>
To: Chris Packham <chris.packham@...iedtelesis.co.nz>, lee@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com,
kuba@...nel.org, pabeni@...hat.com, tsbogend@...ha.franken.de,
hkallweit1@...il.com, linux@...linux.org.uk, daniel@...rotopia.org,
markus.stockhausen@....de
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, linux-mips@...r.kernel.org
Subject: Re: [PATCH net-next v6 4/6] net: mdio: Add RTL9300 MDIO driver
Hi Chris,
On Tue, 2025-02-04 at 16:02 +1300, Chris Packham wrote:
> Add a driver for the MDIO controller on the RTL9300 family of Ethernet
> switches with integrated SoC. There are 4 physical SMI interfaces on the
> RTL9300 however access is done using the switch ports. The driver takes
> the MDIO bus hierarchy from the DTS and uses this to configure the
> switch ports so they are associated with the correct PHY. This mapping
> is also used when dealing with software requests from phylib.
>
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> ---
>
> Notes:
> Changes in v6:
> - Parse port->phy mapping from devicetree removing the need for the
> realtek,port property
Good to see you found a way to do this!
> +/*
> + * MDIO controller for RTL9300 switches with integrated SoC.
> + *
> + * The MDIO communication is abstracted by the switch. At the software level
> + * communication uses the switch port to address the PHY. We work out the
> + * mapping based on the MDIO bus described in device tree and the realtek,port
> + * property.
> + */
Needs an update again ;-)
> +static int rtl9300_mdio_phy_to_port(struct mii_bus *bus, int phy_id)
> +{
> + struct rtl9300_mdio_chan *chan = bus->priv;
> + struct rtl9300_mdio_priv *priv = chan->priv;
> + int i;
> +
> + for (i = find_first_bit(priv->valid_ports, MAX_PORTS);
> + i < MAX_PORTS;
> + i = find_next_bit(priv->valid_ports, MAX_PORTS, i + 1))
You could use the for_each_set_bit(i, priv->valid_ports, MAX_PORTS) loop macro.
> +static int rtl9300_mdio_read_c22(struct mii_bus *bus, int phy_id, int regnum)
> +{
[...]
> +
> + err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, port << 16);
Another candidate for FIELD_PREP()
> + if (err)
> + return err;
> +
> + val = FIELD_PREP(GENMASK(24, 20), regnum) |
> + FIELD_PREP(GENMASK(19, 15), 0x1f) |
> + FIELD_PREP(GENMASK(14, 3), 0xfff) |
You could use #define-s for the GENMASK() field masks too, similar to PHY_CTRL_*. That
would make what you're setting a bit clearer, compared to these literal values.
Nit: You're also setting all-one values, so GENMASK(19, 15) and GENMASK(14, 3) by
themselves are sufficient. E.g. PHY_CTRL_NO_PAGE_PARK and PHY_CTRL_NO_PAGE_SELECT.
> +static int rtl9300_mdiobus_probe(struct platform_device *pdev)
> +{
[...]
> +
> + device_for_each_child_node(dev, child) {
> + err = rtl9300_mdiobus_probe_one(dev, priv, child);
In your next patch you use 'status = "disabled"' for the base dtsi. You may want to use
fwnode_for_each_available_child_node() in that case, so unused busses are not probed.
Best,
Sander
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