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Message-ID: <157d8990-4dcc-4f36-ae6b-c908d1d12965@lunn.ch>
Date: Tue, 8 Apr 2025 20:57:36 +0200
From: Andrew Lunn <andrew@...n.ch>
To: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Jon Hunter <jonathanh@...dia.com>,
linux-arm-kernel@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@...il.com>, netdev@...r.kernel.org,
Paolo Abeni <pabeni@...hat.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Richard Cochran <richardcochran@...il.com>,
Thierry Reding <treding@...dia.com>
Subject: Re: [PATCH net-next 3/5] net: stmmac: intel-plat: remove
eee_usecs_rate and hardware write
On Mon, Apr 07, 2025 at 07:59:01PM +0100, Russell King (Oracle) wrote:
> Remove the write to GMAC_1US_TIC_COUNTER for two reasons:
>
> 1. during initialisation or reinitialisation of the DWMAC core, the
> core is reset, which sets this register back to its default value.
> Writing it prior to stmmac_dvr_probe() has no effect.
>
> 2. Since commit 8efbdbfa9938 ("net: stmmac: Initialize
> MAC_ONEUS_TIC_COUNTER register"), GMAC4/5 core code will set
> this register based on the rate of plat->stmmac_clk. This clock
> is fetched by devm_stmmac_probe_config_dt(), and plat->clk_ptp_rate
> will be set to its rate profided a "ptp_ref" clock is not provided.
> In any case, Marek's commit will set the effectual value of this
> register.
>
> Therefore, dwmac-intel-plat.c writing GMAC_1US_TIC_COUNTER serves no
> useful purpose and can be removed.
>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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