netdev - Re: [PATCH v3 2/5] dt-bindings: net: qca,ar803x: Add IPQ5018 Internal GE PHY support

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Message-ID: <aEPrHCf55eMwJXiL@shell.armlinux.org.uk>
Date: Sat, 7 Jun 2025 08:32:44 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>
Cc: George Moussalem <george.moussalem@...look.com>,
	Rob Herring <robh@...nel.org>,
	Heiner Kallweit <hkallweit1@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Florian Fainelli <f.fainelli@...il.com>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v3 2/5] dt-bindings: net: qca,ar803x: Add IPQ5018
 Internal GE PHY support

On Fri, Jun 06, 2025 at 03:01:26PM +0200, Andrew Lunn wrote:
> > Under 'properties' node:
> >   compatible:
> >     enum:
> >       - ethernet-phy-id004d.d0c0
> > 
> > Q: do I need to add the PHY IDs of all PHYs that the qca803x driver covers
> > or will this one suffice?
> 
> The history is complicated, because PHYs can be enumerated

... provided one doesn't wire up the reset pin to a GPIO and then
declare that in DT as a reset pin for the PHY, thus holding the PHY
in reset while we try to probe what's on the bus, making the ID
unreadable.

The down-side to providing the ID in the compatible is we lose the
revision, so if a new revision of the PHY ends up being fitted
part way through production, the kernel has no way to know.

Sadly, we can't just read the PHY ID when we've released reset
because the ID may be provided in DT because the one in the device
is not reliable / wrong.

What's done on SolidRun platforms is that the PHY reset is connected
to a GPIO, but that is controlled by the boot loader and not by the
kernel. All PHY resets are deasserted before the kernel is entered,
and the reset GPIOs are in DT as "hogged" GPIOs. This allows phylib
to operate normally without any of this faff.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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