netdev - Re: Supporting SGMII to 100BaseFX SFP modules, with broadcom PHYs

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Message-ID: <e29788cb-1817-4168-b058-5d02332f03a8@broadcom.com>
Date: Wed, 25 Jun 2025 08:33:16 -0700
From: Florian Fainelli <florian.fainelli@...adcom.com>
To: Maxime Chevallier <maxime.chevallier@...tlin.com>
Cc: netdev@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
 "Russell King (Oracle)" <linux@...linux.org.uk>,
 Vladimir Oltean <vladimir.oltean@....com>, Marek Behún
 <kabel@...nel.org>, Robert Hancock <robert.hancock@...ian.com>,
 Tao Ren <rentao.bupt@...il.com>
Subject: Re: Supporting SGMII to 100BaseFX SFP modules, with broadcom PHYs

On 6/25/25 00:15, Maxime Chevallier wrote:
> Hi again Florian,
> 
> On Tue, 24 Jun 2025 15:29:25 -0700
> Florian Fainelli <florian.fainelli@...adcom.com> wrote:
> 
>> For 100BaseFX, the signal detection is configured in bit 5 of the shadow
>> 0b01100 in the 0x1C register. You can use bcm_{read,write}_shadow() for
>> that:
>>
>> 0 to use EN_10B/SD as CMOS/TTL signal detect (default)
>> 1 to use SD_100FX± as PECL signal detect
>>
>> You can use either copper or SGMII interface for 100BaseFX and that will
>> be configured this way:
>>
>> - in register 0x1C, shadow 0b10 (1000Base-T/100Base-TX/10Base-T Spare
>> Control 1), set bit 4 to 1 to enable 100BaseFX
>>
>> - disable auto-negotiation with register 0x00 = 0x2100
>>
>> - set register 0x18 to 0x430 (bit 10 -> normal mode, bits 5:4 control
>> the edge rate. 0b00 -> 4ns, 0b01 -> 5ns, 0b10 -> 3ns, 0b11 -> 0ns. This
>> is the auxiliary control register (MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL).
> 
> And I have my first ping going through :) Thank you so much, if I get a
> chance to meet you in person one day, drinks are on me :)

OK, that's great news, looking forward to seeing patches, and I will 
remember your offer :)
-- 
Florian