[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250625091506.051a8723@fedora.home>
Date: Wed, 25 Jun 2025 09:15:06 +0200
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: Florian Fainelli <florian.fainelli@...adcom.com>
Cc: netdev@...r.kernel.org, Andrew Lunn <andrew@...n.ch>, "Russell King
(Oracle)" <linux@...linux.org.uk>, Vladimir Oltean
<vladimir.oltean@....com>, Marek Behún <kabel@...nel.org>,
Robert Hancock <robert.hancock@...ian.com>, Tao Ren <rentao.bupt@...il.com>
Subject: Re: Supporting SGMII to 100BaseFX SFP modules, with broadcom PHYs
Hi again Florian,
On Tue, 24 Jun 2025 15:29:25 -0700
Florian Fainelli <florian.fainelli@...adcom.com> wrote:
> For 100BaseFX, the signal detection is configured in bit 5 of the shadow
> 0b01100 in the 0x1C register. You can use bcm_{read,write}_shadow() for
> that:
>
> 0 to use EN_10B/SD as CMOS/TTL signal detect (default)
> 1 to use SD_100FX± as PECL signal detect
>
> You can use either copper or SGMII interface for 100BaseFX and that will
> be configured this way:
>
> - in register 0x1C, shadow 0b10 (1000Base-T/100Base-TX/10Base-T Spare
> Control 1), set bit 4 to 1 to enable 100BaseFX
>
> - disable auto-negotiation with register 0x00 = 0x2100
>
> - set register 0x18 to 0x430 (bit 10 -> normal mode, bits 5:4 control
> the edge rate. 0b00 -> 4ns, 0b01 -> 5ns, 0b10 -> 3ns, 0b11 -> 0ns. This
> is the auxiliary control register (MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL).
And I have my first ping going through :) Thank you so much, if I get a
chance to meet you in person one day, drinks are on me :)
Thanks again,
Maxime
Powered by blists - more mailing lists