lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250722154111.1871292-1-vineeth.karumanchi@amd.com>
Date: Tue, 22 Jul 2025 21:11:05 +0530
From: Vineeth Karumanchi <vineeth.karumanchi@....com>
To: <nicolas.ferre@...rochip.com>, <claudiu.beznea@...on.dev>,
	<andrew+netdev@...n.ch>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>
CC: <git@....com>, <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<vineeth.karumanchi@....com>
Subject: [PATCH net-next 0/6] net: macb: Add TAPRIO traffic scheduling support

Implement Time-Aware Traffic Scheduling (TAPRIO) offload support
for Cadence MACB/GEM ethernet controllers to enable IEEE 802.1Qbv
compliant time-sensitive networking (TSN) capabilities.

Key features implemented:
- Complete TAPRIO qdisc offload infrastructure with TC_SETUP_QDISC_TAPRIO
- Hardware-accelerated time-based gate control for multiple queues
- Enhanced Scheduled Traffic (ENST) register configuration and management
- Gate state scheduling with configurable start times, on/off intervals
- Support for cycle-time based traffic scheduling with validation
- Hardware capability detection via MACB_CAPS_QBV flag
- Robust error handling and parameter validation
- Queue-specific timing register programming
  (ENST_START_TIME, ENST_ON_TIME, ENST_OFF_TIME)

Changes include:
- Add macb_taprio_setup_replace() for TAPRIO configuration
- Add macb_taprio_destroy() for cleanup and reset
- Add macb_setup_tc() as TC offload entry point
- Enable NETIF_F_HW_TC feature for QBV-capable hardware
- Add ENST register offsets to queue configuration

The implementation validates timing constraints against hardware limits,
supports per-queue gate mask configuration, and provides comprehensive
logging for debugging and monitoring. Hardware registers are programmed
atomically with proper locking to ensure consistent state.

Tested on Xilinx Versal platforms with QBV-capable MACB controllers.

Vineeth Karumanchi (6):
  net: macb: Define ENST hardware registers for time-aware scheduling
  net: macb: Integrate ENST timing parameters and hardware unit
    conversion
  net: macb: Add IEEE 802.1Qbv TAPRIO REPLACE command offload support
  net: macb: Implement TAPRIO DESTROY command offload for gate cleanup
  net: macb: Implement TAPRIO TC offload command interface
  net: macb: Add MACB_CAPS_QBV capability flag for IEEE 802.1Qbv support

 drivers/net/ethernet/cadence/macb.h      |  76 ++++++++
 drivers/net/ethernet/cadence/macb_main.c | 228 ++++++++++++++++++++++-
 2 files changed, 303 insertions(+), 1 deletion(-)

-- 
2.34.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ