netdev - RE: [Intel-wired-lan] [PATCH v6 iwl-next] ice: add recovery clock and clock 1588 control for E825c

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Message-ID: <IA3PR11MB8986CB0C440A58F2D4B34496E55CA@IA3PR11MB8986.namprd11.prod.outlook.com>
Date: Tue, 22 Jul 2025 06:09:31 +0000
From: "Loktionov, Aleksandr" <aleksandr.loktionov@...el.com>
To: "Nitka, Grzegorz" <grzegorz.nitka@...el.com>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "Korba, Przemyslaw"
	<przemyslaw.korba@...el.com>, "Nguyen, Anthony L"
	<anthony.l.nguyen@...el.com>, "Kitszel, Przemyslaw"
	<przemyslaw.kitszel@...el.com>, "Olech, Milena" <milena.olech@...el.com>
Subject: RE: [Intel-wired-lan] [PATCH v6 iwl-next] ice: add recovery clock and
 clock 1588 control for E825c



> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf
> Of Grzegorz Nitka
> Sent: Monday, July 21, 2025 10:44 PM
> To: intel-wired-lan@...ts.osuosl.org
> Cc: netdev@...r.kernel.org; Korba, Przemyslaw
> <przemyslaw.korba@...el.com>; Nguyen, Anthony L
> <anthony.l.nguyen@...el.com>; Kitszel, Przemyslaw
> <przemyslaw.kitszel@...el.com>; Olech, Milena <milena.olech@...el.com>
> Subject: [Intel-wired-lan] [PATCH v6 iwl-next] ice: add recovery clock
> and clock 1588 control for E825c
> 
> From: Przemyslaw Korba <przemyslaw.korba@...el.com>
> 
> Add control for E825 input pins: phy clock recovery and clock 1588.
> E825 does not provide control over platform level DPLL but it provides
> control over PHY clock recovery, and PTP/timestamp driven inputs for
> platform level DPLL.
> 
> Introduce a software controlled layer of abstraction to:
> - create a DPLL of type EEC for E825c,
> - create recovered clock pin for each PF, and control them through
> writing to registers,
> - create pin to control clock 1588 for PF0, and control it through
> writing to registers.
> 
...
> diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h
> b/drivers/net/ethernet/intel/ice/ice_dpll.h
> index c0da03384ce9..90e624b1cb4e 100644
> --- a/drivers/net/ethernet/intel/ice/ice_dpll.h
> +++ b/drivers/net/ethernet/intel/ice/ice_dpll.h
> @@ -24,7 +24,7 @@ enum ice_dpll_pin_sw {
>   * @pin: dpll pin structure
>   * @pf: pointer to pf, which has registered the dpll_pin
>   * @idx: ice pin private idx
> - * @num_parents: hols number of parent pins
> + * @num_parents: hold number of parent pins
>   * @parent_idx: hold indexes of parent pins
>   * @flags: pin flags returned from HW
>   * @state: state of a pin
> @@ -101,11 +101,13 @@ struct ice_dpll {
>   * @pps: pointer to PPS dpll dev
>   * @inputs: input pins pointer
>   * @outputs: output pins pointer
> + * @pin_1588: pin controlling clock 1588 pointer
>   * @rclk: recovered pins pointer
>   * @num_inputs: number of input pins available on dpll
>   * @num_outputs: number of output pins available on dpll
>   * @cgu_state_acq_err_num: number of errors returned during periodic
> work
>   * @base_rclk_idx: idx of first pin used for clock revocery pins
I think s/revocery/recovery/g right?

Otherwise, fine for me.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@...el.com>