netdev - Re: Aquantia PHY in OCSGMII mode?

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Message-ID: <aIxWTIln+zs69w3n@FUE-ALEWI-WINX>
Date: Fri, 1 Aug 2025 07:53:16 +0200
From: Alexander Wilhelm <alexander.wilhelm@...termo.com>
To: Vladimir Oltean <olteanv@...il.com>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, Russell King <linux@...linux.org.uk>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: Aquantia PHY in OCSGMII mode?

Am Thu, Jul 31, 2025 at 08:16:42PM +0300 schrieb Vladimir Oltean:
> Hi Alexander,
> 
> On Thu, Jul 31, 2025 at 04:59:09PM +0200, Alexander Wilhelm wrote:
> > Hello devs,
> > 
> > I'm fairly new to Ethernet PHY drivers and would appreciate your help. I'm
> > working with the Aquantia AQR115 PHY. The existing driver already supports the
> > AQR115C, so I reused that code for the AQR115, assuming minimal differences. My
> > goal is to enable 2.5G link speed. The PHY supports OCSGMII mode, which seems to
> > be non-standard.
> > 
> > * Is it possible to use this mode with the current driver?
> > * If yes, what would be the correct DTS entry?
> > * If not, I’d be willing to implement support. Could you suggest a good starting point?
> > 
> > Any hints or guidance would be greatly appreciated.
> > 
> > 
> > Best regards
> > Alexander Wilhelm
> > 
> 
> In addition to what Andrew and Russell said:
> 
> The Aquantia PHY driver is a bit unlike other PHY drivers, in that it
> prefers not to change the hardware configuration, and work with the
> provisioning of the firmware.
> 
> Do you know that the PHY firmware was built for OCSGMII, or do you just
> intend to use OCSGMII knowing that the hardware capability is there?
> Because the driver reads the VEND1_GLOBAL_CFG registers in
> aqr107_fill_interface_modes(). These registers tell Linux what host
> interface mode to use for each negotiated link speed on the media side.
> 
> If you haven't already,
> 
> [ and I guess you haven't, because you can find there this translation
>   which clearly shows that OCSGMII corresponds to what Linux treats as
>   2500base-x:
> 
> 		case VEND1_GLOBAL_CFG_SERDES_MODE_OCSGMII:
> 			interface = PHY_INTERFACE_MODE_2500BASEX;
> 			break;
> 
> ]
> 
> then you can instrument this function and see what host interface mode
> it detects as configured for VEND1_GLOBAL_CFG_2_5G.

Thank you, Vladimir. I already saw the function in source code, but wasn't realy
sure how DTS need to be configured. Now I see see that 2500BASEX should be used.
I'll check how PHY registers are configured and will look further to what the
MAC driver is doing.


Best regards
Alexander Wilhelm