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Message-ID: <aIxUWqTSpwkJEV9Z@FUE-ALEWI-WINX>
Date: Fri, 1 Aug 2025 07:44:58 +0200
From: Alexander Wilhelm <alexander.wilhelm@...termo.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: Aquantia PHY in OCSGMII mode?

Am Thu, Jul 31, 2025 at 05:02:49PM +0100 schrieb Russell King (Oracle):
> On Thu, Jul 31, 2025 at 05:14:28PM +0200, Andrew Lunn wrote:
> > On Thu, Jul 31, 2025 at 04:59:09PM +0200, Alexander Wilhelm wrote:
> > > Hello devs,
> > > 
> > > I'm fairly new to Ethernet PHY drivers and would appreciate your help. I'm
> > > working with the Aquantia AQR115 PHY. The existing driver already supports the
> > > AQR115C, so I reused that code for the AQR115, assuming minimal differences. My
> > > goal is to enable 2.5G link speed. The PHY supports OCSGMII mode, which seems to
> > > be non-standard.
> > > 
> > > * Is it possible to use this mode with the current driver?
> > > * If yes, what would be the correct DTS entry?
> > > * If not, I’d be willing to implement support. Could you suggest a good starting point?
> > 
> > If the media is using 2500BaseT, the host side generally needs to be
> > using 2500BaseX. There is code which mangles OCSGMII into
> > 2500BaseX. You will need that for AQC115.
> > 
> > You also need a MAC driver which says it supports 2500BaseX.  There is
> > signalling between the PHY and the MAC about how the host interface
> > should be configured, either SGMII for <= 1G and 2500BaseX for
> > 2.5G.
> 
> Not necessarily - if the PHY is configured for rate adaption, then it
> will stay at 2500Base-X and issue pause frames to the MAC driver to
> pace it appropriately.

Thanks a lot for supporting me. The rate adaption, so called AQrate, is exactly
what I want to use. It runs in overclocked SGMII mode and limits somehow the
pace to communicate with MAC.

> 
> Given that it _may_ use rate adaption, I would recommend that the MAC
> driver uses phylink to get all the implementation correct for that
> (one then just needs the MAC driver to do exactly what phylink tells
> it to do, no playing any silly games).
> 
> > Just watch out for the hardware being broken, e.g:
> > 
> > static int aqr105_get_features(struct phy_device *phydev)
> > {
> >         int ret;
> > 
> >         /* Normal feature discovery */
> >         ret = genphy_c45_pma_read_abilities(phydev);
> >         if (ret)
> >                 return ret;
> > 
> >         /* The AQR105 PHY misses to indicate the 2.5G and 5G modes, so add them
> >          * here
> >          */
> >         linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
> >                          phydev->supported);
> >         linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
> >                          phydev->supported);
> > 
> > The AQR115 might support 2.5G, but does it actually announce it
> > supports 2.5G?
> 
> I believe it is capable of advertising 2500BASE-T (otherwise it would
> be pretty silly to set the bit in the supported mask.) However, given
> that this is a firmware driven PHY, it likely depends on the firmware
> build.

I don see any firmware problems. I have one of the latest builds, and from what
I understand, the firmware consists of base image and additionally a
provisioning table. But this table is a kind of pre-configuration. That means I
can override the entire PHY configuration to my needs.

By the way I already have a 2.5G link in U-Boot, but did not get to set lower
speeds. Now I am trying to do at least the same under linux.


Best regards
Alexander Wilhelm

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