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Message-ID: <5e3c5d70-f4fd-46db-90a1-e8be0ae5f750@lunn.ch>
Date: Fri, 15 Aug 2025 05:51:41 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Jisheng Zhang <jszhang@...nel.org>
Cc: Russell King <linux@...linux.org.uk>,
	Florian Fainelli <florian.fainelli@...adcom.com>,
	Jakub Kicinski <kuba@...nel.org>,
	"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org
Subject: Re: [RFC] mdio demux multiplexer driver

On Wed, Aug 13, 2025 at 08:58:06AM +0800, Jisheng Zhang wrote:
> Hi,
> 
> Assume we have the following implementation:
>           ----------
>           |mmio reg|
> 	  ----------
>              |
>  --------    |      -------
>  | MAC0 |--MDIO-----| PHY |
>  -------- |     |   -------
>           |     |
>  -------- |     |   -------
>  | MAC1 |--     ----| PHY |
>  --------           -------
> 
> Both MAC0 and MAC1 have MDIO bus masters, and tie together to
> a single set of clock and data lines, which go to some PHYs. While
> there's a mmio reg to control which MAC mdio master can operate
> the single mdio clock and data lines, so only one MAC can operate
> the mdio clock and data lines.

Where is the SoC boundary? Are the PHYs all external? So there is a
single MDIO bus connected to the outside word? And all the PHYs are on
that external MDIO bus?

> We also need to fully support three use cases: only MAC0 + PHY is used
> on board; only MAC1 + PHY is used on board; MAC0 + MAC1 + PHYs are
> all used.

Linux does not care where a PHY is connected. A PHY is on "some" MDIO
bus. It could be one associated to the MAC, it could be on the MDIO
bus of some other MAC, it could be a GPIO bit banging MDIO bus. It
could be an MDIO bus on its own, not associated to anything. The MAC
DT node has phy-handle pointing to wherever the PHY is.

So, why not KISS. Hard code the MMIO reg so MAC0 is connected to the
PHYs, and MAC1 just uses a phy-handle pointing to the PHYs on MAC0s
MDIO bus.

	Andrew

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