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Message-ID: <20250820171302.324142-3-ariel.dalessandro@collabora.com>
Date: Wed, 20 Aug 2025 14:12:50 -0300
From: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
To: airlied@...il.com,
amergnat@...libre.com,
andrew+netdev@...n.ch,
andrew-ct.chen@...iatek.com,
angelogioacchino.delregno@...labora.com,
ariel.dalessandro@...labora.com,
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Cc: devicetree@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org,
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Subject: [PATCH v1 02/14] media: dt-bindings: Convert MediaTek mt8173-vpu bindings to YAML
Convert the existing text-based DT bindings for Mediatek MT8173 Video Processor
Unit to a YAML schema.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
---
.../bindings/media/mediatek,mt8173-vpu.yaml | 76 +++++++++++++++++++
.../bindings/media/mediatek-vpu.txt | 31 --------
2 files changed, 76 insertions(+), 31 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml
delete mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt
diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml
new file mode 100644
index 0000000000000..44f5d7cc44042
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mt8173-vpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek MT8173 Video Processor Unit
+
+maintainers:
+ - Ariel D'Alessandro <ariel.dalessandro@...labora.com>
+
+description:
+ Video Processor Unit is a HW video controller. It controls HW Codec including
+ H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
+
+properties:
+ compatible:
+ const: mediatek,mt8173-vpu
+
+ reg:
+ minItems: 2
+
+ reg-names:
+ items:
+ - const: tcm
+ - const: cfg_reg
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: main
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory used by VPU
+ (see bindings/reserved-memory/reserved-memory.txt)
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+ - memory-region
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8173-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ vpu: vpu@...20000 {
+ compatible = "mediatek,mt8173-vpu";
+ reg = <0 0x10020000 0 0x30000>,
+ <0 0x10050000 0 0x100>;
+ reg-names = "tcm", "cfg_reg";
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&topckgen CLK_TOP_SCP_SEL>;
+ clock-names = "main";
+ memory-region = <&vpu_dma_reserved>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
deleted file mode 100644
index 2a5bac37f9a22..0000000000000
--- a/Documentation/devicetree/bindings/media/mediatek-vpu.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-* Mediatek Video Processor Unit
-
-Video Processor Unit is a HW video controller. It controls HW Codec including
-H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
-
-Required properties:
- - compatible: "mediatek,mt8173-vpu"
- - reg: Must contain an entry for each entry in reg-names.
- - reg-names: Must include the following entries:
- "tcm": tcm base
- "cfg_reg": Main configuration registers base
- - interrupts: interrupt number to the cpu.
- - clocks : clock name from clock manager
- - clock-names: must be main. It is the main clock of VPU
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for VPU extended memory; if not present, VPU may be located
- anywhere in the memory
-
-Example:
- vpu: vpu@...20000 {
- compatible = "mediatek,mt8173-vpu";
- reg = <0 0x10020000 0 0x30000>,
- <0 0x10050000 0 0x100>;
- reg-names = "tcm", "cfg_reg";
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&topckgen TOP_SCP_SEL>;
- clock-names = "main";
- };
--
2.50.1
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