lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250820171302.324142-4-ariel.dalessandro@collabora.com>
Date: Wed, 20 Aug 2025 14:12:51 -0300
From: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
To: airlied@...il.com,
	amergnat@...libre.com,
	andrew+netdev@...n.ch,
	andrew-ct.chen@...iatek.com,
	angelogioacchino.delregno@...labora.com,
	ariel.dalessandro@...labora.com,
	broonie@...nel.org,
	chunkuang.hu@...nel.org,
	ck.hu@...iatek.com,
	conor+dt@...nel.org,
	davem@...emloft.net,
	dmitry.torokhov@...il.com,
	edumazet@...gle.com,
	flora.fu@...iatek.com,
	houlong.wei@...iatek.com,
	jeesw@...fas.com,
	jmassot@...labora.com,
	kernel@...labora.com,
	krzk+dt@...nel.org,
	kuba@...nel.org,
	kyrie.wu@...iatek.corp-partner.google.com,
	lgirdwood@...il.com,
	linus.walleij@...aro.org,
	louisalexis.eyraud@...labora.com,
	maarten.lankhorst@...ux.intel.com,
	matthias.bgg@...il.com,
	mchehab@...nel.org,
	minghsiu.tsai@...iatek.com,
	mripard@...nel.org,
	p.zabel@...gutronix.de,
	pabeni@...hat.com,
	robh@...nel.org,
	sean.wang@...nel.org,
	simona@...ll.ch,
	support.opensource@...semi.com,
	tiffany.lin@...iatek.com,
	tzimmermann@...e.de,
	yunfei.dong@...iatek.com
Cc: devicetree@...r.kernel.org,
	dri-devel@...ts.freedesktop.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-clk@...r.kernel.org,
	linux-gpio@...r.kernel.org,
	linux-input@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-media@...r.kernel.org,
	linux-mediatek@...ts.infradead.org,
	linux-sound@...r.kernel.org,
	netdev@...r.kernel.org
Subject: [PATCH v1 03/14] dt-bindings: arm: mediatek: mmsys: Add assigned-clocks/rates properties

Current, the DT bindings for MediaTek mmsys controller is missing the
assigned-clocks and assigned-clocks-rates properties. Add these and
update the example as well.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 3f4262e93c789..d045d366eb8e2 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -68,6 +68,12 @@ properties:
       of the power controller specified by phandle. See
       Documentation/devicetree/bindings/power/power-domain.yaml for details.
 
+  assigned-clocks:
+    maxItems: 1
+
+  assigned-clock-rates:
+    maxItems: 1
+
   mboxes:
     description:
       Using mailbox to communicate with GCE, it should have this
@@ -130,6 +136,7 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/clock/mt8173-clk.h>
     #include <dt-bindings/power/mt8173-power.h>
     #include <dt-bindings/gce/mt8173-gce.h>
 
@@ -137,6 +144,8 @@ examples:
         compatible = "mediatek,mt8173-mmsys", "syscon";
         reg = <0x14000000 0x1000>;
         power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
+        assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
+        assigned-clock-rates = <400000000>;
         #clock-cells = <1>;
         #reset-cells = <1>;
         mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
-- 
2.50.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ