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Message-ID: <c82d44af-d107-4e84-b5ae-eeb624bc03af@oss.qualcomm.com>
Date: Wed, 3 Sep 2025 18:12:59 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Wasim Nazir <wasim.nazir@....qualcomm.com>
Cc: Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Richard Cochran <richardcochran@...il.com>, kernel@....qualcomm.com,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
netdev@...r.kernel.org, Monish Chunara <quic_mchunara@...cinc.com>
Subject: Re: [PATCH 2/5] arm64: dts: qcom: lemans: Add SDHC controller and SDC
pin configuration
On 8/27/25 3:20 AM, Dmitry Baryshkov wrote:
> On Tue, Aug 26, 2025 at 11:51:01PM +0530, Wasim Nazir wrote:
>> From: Monish Chunara <quic_mchunara@...cinc.com>
>>
>> Introduce the SDHC v5 controller node for the Lemans platform.
>> This controller supports either eMMC or SD-card, but only one
>> can be active at a time. SD-card is the preferred configuration
>> on Lemans targets, so describe this controller.
>>
>> Define the SDC interface pins including clk, cmd, and data lines
>> to enable proper communication with the SDHC controller.
>>
>> Signed-off-by: Monish Chunara <quic_mchunara@...cinc.com>
>> Co-developed-by: Wasim Nazir <wasim.nazir@....qualcomm.com>
>> Signed-off-by: Wasim Nazir <wasim.nazir@....qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/lemans.dtsi | 70 ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 70 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
>> index 99a566b42ef2..a5a3cdba47f3 100644
>> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
>> @@ -3834,6 +3834,36 @@ apss_tpdm2_out: endpoint {
>> };
>> };
>>
>> + sdhc: mmc@...4000 {
>> + compatible = "qcom,sa8775p-sdhci", "qcom,sdhci-msm-v5";
>> + reg = <0x0 0x087c4000 0x0 0x1000>;
>> +
>> + interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 521 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC1_AHB_CLK>,
>> + <&gcc GCC_SDCC1_APPS_CLK>;
>> + clock-names = "iface", "core";
>> +
>> + interconnects = <&aggre1_noc MASTER_SDC 0 &mc_virt SLAVE_EBI1 0>,
>> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDC1 0>;
>> + interconnect-names = "sdhc-ddr", "cpu-sdhc";
>> +
>> + iommus = <&apps_smmu 0x0 0x0>;
>> + dma-coherent;
>> +
>> + resets = <&gcc GCC_SDCC1_BCR>;
>> +
>> + no-sdio;
>> + no-mmc;
>> + bus-width = <4>;
>
> This is the board configuration, it should be defined in the EVK DTS.
Unless the controller is actually incapable of doing non-SDCards
But from the limited information I can find, this one should be able
to do both
Konrad
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