lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <121a7d8d-6918-452d-9d81-413a54d743bc@gmail.com>
Date: Thu, 11 Sep 2025 09:22:28 +0300
From: Tariq Toukan <ttoukan.linux@...il.com>
To: Li Tian <litian@...hat.com>, netdev@...r.kernel.org,
 linux-hyperv@...r.kernel.org
Cc: Saeed Mahameed <saeedm@...dia.com>, Tariq Toukan <tariqt@...dia.com>,
 Mark Bloch <mbloch@...dia.com>, Leon Romanovsky <leon@...nel.org>,
 Haiyang Zhang <haiyangz@...rosoft.com>,
 Benjamin Poirier <bpoirier@...hat.com>,
 Vitaly Kuznetsov <vkuznets@...hat.com>, Carolina Jubran
 <cjubran@...dia.com>, Shahar Shitrit <shshitrit@...dia.com>
Subject: Re: [PATCH net v2] net/mlx5: Not returning mlx5_link_info table when
 speed is unknown



On 10/09/2025 3:37, Li Tian wrote:
> Because mlx5e_link_info and mlx5e_ext_link_info have holes
> e.g. Azure mlx5 reports PTYS 19. Do not return it unless speed
> is retrieved successfully.
> 
> Fixes: 65a5d35571849 ("net/mlx5: Refactor link speed handling with mlx5_link_info struct")
> Suggested-by: Vitaly Kuznetsov <vkuznets@...hat.com>
> Signed-off-by: Li Tian <litian@...hat.com>
> ---
> v2:
>   - Fix indentation and spacing only.
> v1: https://lore.kernel.org/netdev/20250908085313.18768-1-litian@redhat.com
> ---
>   drivers/net/ethernet/mellanox/mlx5/core/port.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c
> index 2d7adf7444ba..aa9f2b0a77d3 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/port.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/port.c
> @@ -1170,7 +1170,11 @@ const struct mlx5_link_info *mlx5_port_ptys2info(struct mlx5_core_dev *mdev,
>   	mlx5e_port_get_link_mode_info_arr(mdev, &table, &max_size,
>   					  force_legacy);
>   	i = find_first_bit(&temp, max_size);
> -	if (i < max_size)
> +
> +	/* mlx5e_link_info has holes. Check speed
> +	 * is not zero as indication of one.
> +	 */
> +	if (i < max_size && table[i].speed)
>   		return &table[i];
>   
>   	return NULL;

Reviewed-by: Tariq Toukan <tariqt@...dia.com>
Thanks.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ