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Message-ID:
<176133835222.2245037.11430728108477849570.stgit@ahduyck-xeon-server.home.arpa>
Date: Fri, 24 Oct 2025 13:40:33 -0700
From: Alexander Duyck <alexander.duyck@...il.com>
To: netdev@...r.kernel.org
Cc: kuba@...nel.org, kernel-team@...a.com, andrew+netdev@...n.ch,
hkallweit1@...il.com, linux@...linux.org.uk, pabeni@...hat.com,
davem@...emloft.net
Subject: [net-next PATCH 0/8] net: phy: Add support for fbnic PHY w/ 25G, 50G,
and 100G support
To enable eventually transitioning the fbnic driver to using the XPCS
driver we first need to address the fact that we need a representation for
the FW managed PMA/PMD that is actually a SerDes PHY to handle link
bouncing during link training.
To enable that this patch set first introduces the necessary bits to the
generic c45 driver to enable it to read 25G, 50G, and 100G modes from the
PHY. One complication to this though is the fact that 50GBase-CR2 doesn't
exist in the IEEE version of the specification. For now I am taking the
approach that the PMA can show a speed of 50G in the CTRL1 register and set
the PMA_CTRL2 register for 100GBase-CR4 as I am using that as an alias for
the 50R2 due to the fact that the media used is 100R4, it is just shared
between 2 instaces the 50G interface as per the Consortium specification. I
am still open to suggestions on other ways to implement this as it isn't
set in stone and changing it would be pretty straight forward since the
only thing currently impementing this is a SW based MII interface.
Otherwise for 25R1, 50R1, and 100R2 the interface matches the IEEE
specification.
The rest of this patch set enables the changes to fbnic to make use of this
interface and expose a phydev that can provide a necessary link delay to
avoid link flapping in the event that a cable is disconnected and
reconnected, and to correctly provide the count for the link down events.
---
Alexander Duyck (8):
net: phy: Add support for 25, 50 and 100Gbps PMA to genphy_c45_read_pma
net: phy: Avoid reusing val in genphy_c45_pma_read_ext_abilities
net: phy: Add 25G-CR, 50G-CR, 100G-CR2 support to C45 genphy
fbnic: Rename PCS IRQ to MAC IRQ as it is actually a MAC interrupt
fbnic: Add logic to track PMD state via MAC/PCS signals
fbnic: Cleanup handling for link down event statistics
fbnic: Add SW shim for MII interface to PMA/PMD
fbnic: Add phydev representing PMD to phylink setup
drivers/net/ethernet/meta/fbnic/Makefile | 1 +
drivers/net/ethernet/meta/fbnic/fbnic.h | 15 +-
drivers/net/ethernet/meta/fbnic/fbnic_csr.h | 2 +
.../net/ethernet/meta/fbnic/fbnic_ethtool.c | 9 +
drivers/net/ethernet/meta/fbnic/fbnic_irq.c | 42 +++--
drivers/net/ethernet/meta/fbnic/fbnic_mac.c | 69 +++++---
drivers/net/ethernet/meta/fbnic/fbnic_mac.h | 39 +++--
.../net/ethernet/meta/fbnic/fbnic_netdev.c | 7 +-
.../net/ethernet/meta/fbnic/fbnic_netdev.h | 3 +-
drivers/net/ethernet/meta/fbnic/fbnic_pci.c | 7 +
.../net/ethernet/meta/fbnic/fbnic_phylink.c | 121 ++++++++++---
drivers/net/ethernet/meta/fbnic/fbnic_swmii.c | 145 ++++++++++++++++
drivers/net/phy/phy-c45.c | 164 ++++++++++++++++--
include/uapi/linux/mdio.h | 43 ++++-
14 files changed, 568 insertions(+), 99 deletions(-)
create mode 100644 drivers/net/ethernet/meta/fbnic/fbnic_swmii.c
--
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