netdev - [net-next PATCH 2/8] net: phy: Avoid reusing val in genphy_c45_pma_read_ext

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Message-ID: 
 <176133844705.2245037.8720565860938363849.stgit@ahduyck-xeon-server.home.arpa>
Date: Fri, 24 Oct 2025 13:40:47 -0700
From: Alexander Duyck <alexander.duyck@...il.com>
To: netdev@...r.kernel.org
Cc: kuba@...nel.org, kernel-team@...a.com, andrew+netdev@...n.ch,
 hkallweit1@...il.com, linux@...linux.org.uk, pabeni@...hat.com,
 davem@...emloft.net
Subject: [net-next PATCH 2/8] net: phy: Avoid reusing val in
 genphy_c45_pma_read_ext_abilities

From: Alexander Duyck <alexanderduyck@...com>

In planning to add support for additional capabilities I realized we have a
bit of an issue in the way that genphy_c45_pma_read_ext_abilities is setup.
It is reusing val for both an error return and the tracking of the PMA
extended abilities register. As such if any one ability is enabled it will
end up overwriting it with 0 and block the checks for other abilities.

Rather than do that I am updating the code to contain the individual
ability register checks into separate functions and adding an err value to
handle the returns of those calls.

Signed-off-by: Alexander Duyck <alexanderduyck@...com>
---
 drivers/net/phy/phy-c45.c |   43 +++++++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 16 deletions(-)

diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c
index 2b178a789941..4210863c1b6e 100644
--- a/drivers/net/phy/phy-c45.c
+++ b/drivers/net/phy/phy-c45.c
@@ -958,6 +958,26 @@ int genphy_c45_an_config_eee_aneg(struct phy_device *phydev)
 }
 EXPORT_SYMBOL_GPL(genphy_c45_an_config_eee_aneg);
 
+static int genphy_c45_pma_ng_read_abilities(struct phy_device *phydev)
+{
+	int val;
+
+	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
+			   MDIO_PMA_NG_EXTABLE);
+	if (val < 0)
+		return val;
+
+	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+			 phydev->supported,
+			 val & MDIO_PMA_NG_EXTABLE_2_5GBT);
+
+	linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+			 phydev->supported,
+			 val & MDIO_PMA_NG_EXTABLE_5GBT);
+
+	return 0;
+}
+
 /**
  * genphy_c45_pma_baset1_read_abilities - read supported baset1 link modes from PMA
  * @phydev: target phy_device struct
@@ -1005,7 +1025,7 @@ EXPORT_SYMBOL_GPL(genphy_c45_pma_baset1_read_abilities);
  */
 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev)
 {
-	int val;
+	int val, err;
 
 	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE);
 	if (val < 0)
@@ -1045,24 +1065,15 @@ int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev)
 			 val & MDIO_PMA_EXTABLE_10BT);
 
 	if (val & MDIO_PMA_EXTABLE_NBT) {
-		val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
-				   MDIO_PMA_NG_EXTABLE);
-		if (val < 0)
-			return val;
-
-		linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
-				 phydev->supported,
-				 val & MDIO_PMA_NG_EXTABLE_2_5GBT);
-
-		linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
-				 phydev->supported,
-				 val & MDIO_PMA_NG_EXTABLE_5GBT);
+		err = genphy_c45_pma_ng_read_abilities(phydev);
+		if (err < 0)
+			return err;
 	}
 
 	if (val & MDIO_PMA_EXTABLE_BT1) {
-		val = genphy_c45_pma_baset1_read_abilities(phydev);
-		if (val < 0)
-			return val;
+		err = genphy_c45_pma_baset1_read_abilities(phydev);
+		if (err < 0)
+			return err;
 	}
 
 	return 0;