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Message-ID: <2fabbe4a-754d-40bb-ba10-48ef79df875c@lunn.ch>
Date: Mon, 3 Nov 2025 19:59:31 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Alexander Duyck <alexander.duyck@...il.com>
Cc: netdev@...r.kernel.org, kuba@...nel.org, kernel-team@...a.com,
andrew+netdev@...n.ch, hkallweit1@...il.com, linux@...linux.org.uk,
pabeni@...hat.com, davem@...emloft.net
Subject: Re: [net-next PATCH v2 09/11] fbnic: Add SW shim for MDIO interface
to PMA/PMD and PCS
> The interface will consist of 2 PHYs each consisting of a PMA/PMD and a PCS
> located at addresses 0 and 1.
I'm missing a bit of architecture here.
At least for speeds up to 10G, we have the MAC enumerate what it can
do, the PCS enumerates its capabilities, and we read the EERPOM of the
SFP to find out what it supports. From that, we can figure out the
subset of link modes which are supported, and configure the MAC and
PCS as required.
What information is missing from this picture that requires the
PMA/PMD to be represented? And how is this going to work when we do
have access to the SFPs EERPOM?
Andrew
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