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Message-ID: <e9a03b93-50e2-4d1c-a20a-ad243366ebd9@bootlin.com>
Date: Thu, 6 Nov 2025 11:05:28 +0100
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
<davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@...il.com>, netdev@...r.kernel.org,
Paolo Abeni <pabeni@...hat.com>
Subject: Re: [PATCH net-next v2 06/11] net: stmmac: ingenic: use
stmmac_get_phy_intf_sel()
On 06/11/2025 09:57, Russell King (Oracle) wrote:
> Use stmmac_get_phy_intf_sel() to decode the PHY interface mode to the
> phy_intf_sel value, validate the result against the SoC specific
> supported phy_intf_sel values, and pass into the SoC specific
> set_mode() methods, replacing the local phy_intf_sel variable. This
> provides the value for the MACPHYC_PHY_INFT_MASK field.
>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
This looks correct to me :)
Reviewed-by: Maxime Chevallier <maxime.chevallier@...tlin.com>
Maxime
> ---
> .../ethernet/stmicro/stmmac/dwmac-ingenic.c | 55 ++++++++++++-------
> 1 file changed, 34 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c
> index 6680f7d3a469..79735a476e86 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c
> @@ -64,28 +64,27 @@ struct ingenic_soc_info {
> enum ingenic_mac_version version;
> u32 mask;
>
> - int (*set_mode)(struct plat_stmmacenet_data *plat_dat);
> + int (*set_mode)(struct plat_stmmacenet_data *plat_dat, u8 phy_intf_sel);
> +
> + u8 valid_phy_intf_sel;
> };
>
> -static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
> + u8 phy_intf_sel)
> {
> struct ingenic_mac *mac = plat_dat->bsp_priv;
> unsigned int val;
> - u8 phy_intf_sel;
>
> switch (plat_dat->phy_interface) {
> case PHY_INTERFACE_MODE_MII:
> - phy_intf_sel = PHY_INTF_SEL_GMII_MII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n");
> break;
>
> case PHY_INTERFACE_MODE_GMII:
> - phy_intf_sel = PHY_INTF_SEL_GMII_MII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n");
> break;
>
> case PHY_INTERFACE_MODE_RMII:
> - phy_intf_sel = PHY_INTF_SEL_RMII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
> break;
>
> @@ -93,7 +92,6 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> case PHY_INTERFACE_MODE_RGMII_ID:
> case PHY_INTERFACE_MODE_RGMII_TXID:
> case PHY_INTERFACE_MODE_RGMII_RXID:
> - phy_intf_sel = PHY_INTF_SEL_RGMII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n");
> break;
>
> @@ -110,7 +108,8 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
> }
>
> -static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
> + u8 phy_intf_sel)
> {
> struct ingenic_mac *mac = plat_dat->bsp_priv;
>
> @@ -129,15 +128,14 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, 0);
> }
>
> -static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
> + u8 phy_intf_sel)
> {
> struct ingenic_mac *mac = plat_dat->bsp_priv;
> unsigned int val;
> - u8 phy_intf_sel;
>
> switch (plat_dat->phy_interface) {
> case PHY_INTERFACE_MODE_RMII:
> - phy_intf_sel = PHY_INTF_SEL_RMII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
> break;
>
> @@ -153,16 +151,15 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
> }
>
> -static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
> + u8 phy_intf_sel)
> {
> struct ingenic_mac *mac = plat_dat->bsp_priv;
> unsigned int val;
> - u8 phy_intf_sel;
>
> switch (plat_dat->phy_interface) {
> case PHY_INTERFACE_MODE_RMII:
> val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII);
> - phy_intf_sel = PHY_INTF_SEL_RMII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
> break;
>
> @@ -178,17 +175,16 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
> }
>
> -static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat,
> + u8 phy_intf_sel)
> {
> struct ingenic_mac *mac = plat_dat->bsp_priv;
> unsigned int val;
> - u8 phy_intf_sel;
>
> switch (plat_dat->phy_interface) {
> case PHY_INTERFACE_MODE_RMII:
> val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |
> FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);
> - phy_intf_sel = PHY_INTF_SEL_RMII;
> dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
> break;
>
> @@ -197,8 +193,6 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> case PHY_INTERFACE_MODE_RGMII_TXID:
> case PHY_INTERFACE_MODE_RGMII_RXID:
> val = 0;
> - phy_intf_sel = PHY_INTF_SEL_RGMII;
> -
> if (mac->tx_delay == 0)
> val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN);
> else
> @@ -229,10 +223,21 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
> static int ingenic_mac_init(struct platform_device *pdev, void *bsp_priv)
> {
> struct ingenic_mac *mac = bsp_priv;
> - int ret;
> + phy_interface_t interface;
> + int phy_intf_sel, ret;
>
> if (mac->soc_info->set_mode) {
> - ret = mac->soc_info->set_mode(mac->plat_dat);
> + interface = mac->plat_dat->phy_interface;
> +
> + phy_intf_sel = stmmac_get_phy_intf_sel(interface);
> + if (phy_intf_sel < 0 || phy_intf_sel >= BITS_PER_BYTE ||
> + ~mac->soc_info->valid_phy_intf_sel & BIT(phy_intf_sel)) {
> + dev_err(mac->dev, "unsupported interface %s\n",
> + phy_modes(interface));
> + return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL;
> + }
> +
> + ret = mac->soc_info->set_mode(mac->plat_dat, phy_intf_sel);
> if (ret)
> return ret;
> }
> @@ -309,6 +314,9 @@ static struct ingenic_soc_info jz4775_soc_info = {
> .mask = MACPHYC_TXCLK_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,
>
> .set_mode = jz4775_mac_set_mode,
> + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_GMII_MII) |
> + BIT(PHY_INTF_SEL_RGMII) |
> + BIT(PHY_INTF_SEL_RMII),
> };
>
> static struct ingenic_soc_info x1000_soc_info = {
> @@ -316,6 +324,7 @@ static struct ingenic_soc_info x1000_soc_info = {
> .mask = MACPHYC_SOFT_RST_MASK,
>
> .set_mode = x1000_mac_set_mode,
> + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII),
> };
>
> static struct ingenic_soc_info x1600_soc_info = {
> @@ -323,6 +332,7 @@ static struct ingenic_soc_info x1600_soc_info = {
> .mask = MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,
>
> .set_mode = x1600_mac_set_mode,
> + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII),
> };
>
> static struct ingenic_soc_info x1830_soc_info = {
> @@ -330,6 +340,7 @@ static struct ingenic_soc_info x1830_soc_info = {
> .mask = MACPHYC_MODE_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,
>
> .set_mode = x1830_mac_set_mode,
> + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII),
> };
>
> static struct ingenic_soc_info x2000_soc_info = {
> @@ -338,6 +349,8 @@ static struct ingenic_soc_info x2000_soc_info = {
> MACPHYC_RX_DELAY_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,
>
> .set_mode = x2000_mac_set_mode,
> + .valid_phy_intf_sel = BIT(PHY_INTF_SEL_RGMII) |
> + BIT(PHY_INTF_SEL_RMII),
> };
>
> static const struct of_device_id ingenic_mac_of_matches[] = {
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