lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <14f80863-5766-437a-8e38-8991a1a725f9@bootlin.com>
Date: Fri, 7 Nov 2025 19:23:26 +0100
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
 Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
 Andrew Lunn <andrew+netdev@...n.ch>,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
 "David S. Miller" <davem@...emloft.net>,
 Emil Renner Berthing <kernel@...il.dk>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Jerome Brunet <jbrunet@...libre.com>,
 Keguang Zhang <keguang.zhang@...il.com>, Kevin Hilman
 <khilman@...libre.com>, linux-amlogic@...ts.infradead.org,
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
 linux-mips@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
 Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
 Matthias Brugger <matthias.bgg@...il.com>,
 Maxime Coquelin <mcoquelin.stm32@...il.com>,
 Minda Chen <minda.chen@...rfivetech.com>,
 Neil Armstrong <neil.armstrong@...aro.org>, netdev@...r.kernel.org,
 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@...l.toshiba>,
 Paolo Abeni <pabeni@...hat.com>
Subject: Re: [PATCH net-next 16/16] net: stmmac: visconti: use
 stmmac_get_phy_intf_sel()

Hi Russell,

On 07/11/2025 15:29, Russell King (Oracle) wrote:
> Use stmmac_get_phy_intf_sel() to decode the PHY interface mode to the
> phy_intf_sel value, validate the result and use that to set the
> control register to select the operating mode for the DWMAC core.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
> ---
>  .../ethernet/stmicro/stmmac/dwmac-visconti.c  | 26 +++++--------------
>  1 file changed, 6 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
> index 7b6b048e1be0..9497b13a5753 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
> @@ -42,10 +42,6 @@
>  
>  #define ETHER_CLK_SEL_RX_TX_CLK_EN (ETHER_CLK_SEL_RX_CLK_EN | ETHER_CLK_SEL_TX_CLK_EN)
>  
> -#define ETHER_CONFIG_INTF_MII	PHY_INTF_SEL_GMII_MII
> -#define ETHER_CONFIG_INTF_RGMII	PHY_INTF_SEL_RGMII
> -#define ETHER_CONFIG_INTF_RMII	PHY_INTF_SEL_RMII
> -
>  struct visconti_eth {
>  	void __iomem *reg;
>  	struct clk *phy_ref_clk;
> @@ -150,22 +146,12 @@ static int visconti_eth_init_hw(struct platform_device *pdev, struct plat_stmmac
>  {
>  	struct visconti_eth *dwmac = plat_dat->bsp_priv;
>  	unsigned int clk_sel_val;
> -	u32 phy_intf_sel;
> -
> -	switch (plat_dat->phy_interface) {
> -	case PHY_INTERFACE_MODE_RGMII:
> -	case PHY_INTERFACE_MODE_RGMII_ID:
> -	case PHY_INTERFACE_MODE_RGMII_RXID:
> -	case PHY_INTERFACE_MODE_RGMII_TXID:
> -		phy_intf_sel = ETHER_CONFIG_INTF_RGMII;
> -		break;
> -	case PHY_INTERFACE_MODE_MII:
> -		phy_intf_sel = ETHER_CONFIG_INTF_MII;
> -		break;
> -	case PHY_INTERFACE_MODE_RMII:
> -		phy_intf_sel = ETHER_CONFIG_INTF_RMII;
> -		break;
> -	default:
> +	int phy_intf_sel;
> +
> +	phy_intf_sel = stmmac_get_phy_intf_sel(plat_dat->phy_interface);
> +	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &&
> +	    phy_intf_sel != PHY_INTF_SEL_RGMII &&
> +	    phy_intf_sel != PHY_INTF_SEL_RMII) {
>  		dev_err(&pdev->dev, "Unsupported phy-mode (%d)\n", plat_dat->phy_interface);
>  		return -EOPNOTSUPP;
>  	}

Probably not too big of a deal, but don't we now incorrectly accept the
"gmii" mode ?

Maxime

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ