lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <IA3PR11MB898649A13E7FE4FF54F6601AE5DFA@IA3PR11MB8986.namprd11.prod.outlook.com>
Date: Thu, 27 Nov 2025 07:01:57 +0000
From: "Loktionov, Aleksandr" <aleksandr.loktionov@...el.com>
To: "Lifshits, Vitaly" <vitaly.lifshits@...el.com>,
	"intel-wired-lan@...osl.org" <intel-wired-lan@...osl.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>, "andrew+netdev@...n.ch"
	<andrew+netdev@...n.ch>, "horms@...nel.org" <horms@...nel.org>,
	"kuba@...nel.org" <kuba@...nel.org>, "edumazet@...gle.com"
	<edumazet@...gle.com>, "davem@...emloft.net" <davem@...emloft.net>,
	"pabeni@...hat.com" <pabeni@...hat.com>
CC: "Lifshits, Vitaly" <vitaly.lifshits@...el.com>
Subject: RE: [Intel-wired-lan] [PATCH iwl-next v1 1/1] e1000e: introduce
 private flag to override XTAL clock frequency



> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf Of
> Vitaly Lifshits
> Sent: Thursday, November 27, 2025 5:31 AM
> To: intel-wired-lan@...osl.org; netdev@...r.kernel.org;
> andrew+netdev@...n.ch; horms@...nel.org; kuba@...nel.org;
> edumazet@...gle.com; davem@...emloft.net; pabeni@...hat.com
> Cc: Lifshits, Vitaly <vitaly.lifshits@...el.com>
> Subject: [Intel-wired-lan] [PATCH iwl-next v1 1/1] e1000e: introduce private
> flag to override XTAL clock frequency
> 
> On some TGP and ADP systems, the hardware XTAL clock is incorrectly set to
Please expand platform abbreviations ("TGP (Tiger Lake PCH)", "ADP (Alder Lake PCH)") and add minimal test context (kernel ver., device PCI ID, FW, phc_ctl version, and whether CLOCK_REALTIME vs PHC was compared). 

> 24MHz instead of the expected 38.4MHz, causing PTP timer inaccuracies. Since
> affected systems cannot be reliably detected, introduce an ethtool private
> flag that allows user-space to override the XTAL clock frequency.
> 
> Tested on an affected system using the phc_ctl tool:
> 
> Without the flag:
>   sudo phc_ctl enp0s31f6 set 0.0 wait 10 get
>   phc_ctl[...] clock time is 16.000541250 (expected ~10s)
> 
> With the flag:
>   sudo phc_ctl enp0s31f6 set 0.0 wait 10 get
>   phc_ctl[...] clock time is 9.984407212 (expected ~10s)
> 
If the XTAL override is applied via a devlink driverinit param, this reset is expected and should be documented.
If it remains a runtime privflag, I think you should explain why a reset is required.
I'd recommend documenting the reset requirement and user impact (link flap, timestamp discontinuity).
/* Add a short comment near the reset logic in code and
   Documentation/networking/devlink/e1000e.rst (if converted to devlink param)
Or Documentation/networking/ethtool-netlink.rst (if kept as privflag) */

> Signed-off-by: Vitaly Lifshits <vitaly.lifshits@...el.com>
> ---
>  drivers/net/ethernet/intel/e1000e/e1000.h   |  7 ++--
>  drivers/net/ethernet/intel/e1000e/ethtool.c | 39 ++++++++++-----------
> drivers/net/ethernet/intel/e1000e/ich8lan.c |  4 +--
> drivers/net/ethernet/intel/e1000e/netdev.c  | 18 +++++++---
>  4 files changed, 39 insertions(+), 29 deletions(-)
> 

...

> --
> 2.34.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ