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Message-ID: <a68ae867-55d8-4198-b0ab-0419af8c46b1@mailbox.org>
Date: Wed, 3 Dec 2025 21:51:16 +0100
From: Marek Vasut <marek.vasut@...lbox.org>
To: Ivan Galkin <Ivan.Galkin@...s.com>,
"vladimir.oltean@....com" <vladimir.oltean@....com>
Cc: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"andrew@...n.ch" <andrew@...n.ch>, "davem@...emloft.net"
<davem@...emloft.net>, "hkallweit1@...il.com" <hkallweit1@...il.com>,
"michael@...sekall.de" <michael@...sekall.de>,
"pabeni@...hat.com" <pabeni@...hat.com>, "robh@...nel.org"
<robh@...nel.org>, "linux@...linux.org.uk" <linux@...linux.org.uk>,
"olek2@...pl" <olek2@...pl>, "f.fainelli@...il.com" <f.fainelli@...il.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"edumazet@...gle.com" <edumazet@...gle.com>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "kuba@...nel.org"
<kuba@...nel.org>
Subject: Re: [net-next,PATCH 3/3] net: phy: realtek: Add property to enable
SSC
On 12/3/25 2:01 PM, Ivan Galkin wrote:
> On Wed, 2025-12-03 at 11:42 +0200, Vladimir Oltean wrote:
>> [You don't often get email from vladimir.oltean@....com. Learn why
>> this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>
>> On Sun, Nov 30, 2025 at 01:58:34AM +0100, Marek Vasut wrote:
>>> Add support for spread spectrum clocking (SSC) on RTL8211F(D)(I)-
>>> CG,
>>> RTL8211FS(I)(-VS)-CG, RTL8211FG(I)(-VS)-CG PHYs. The implementation
>>> follows EMI improvement application note Rev. 1.2 for these PHYs.
>>>
>>> The current implementation enables SSC for both RXC and SYSCLK
>>> clock
>>> signals. Introduce new DT property 'realtek,ssc-enable' to enable
>>> the
>>> SSC mode.
>>>
>>> Signed-off-by: Marek Vasut <marek.vasut@...lbox.org>
>>> ---
>>> Cc: "David S. Miller" <davem@...emloft.net>
>>> Cc: Aleksander Jan Bajkowski <olek2@...pl>
>>> Cc: Andrew Lunn <andrew@...n.ch>
>>> Cc: Conor Dooley <conor+dt@...nel.org>
>>> Cc: Eric Dumazet <edumazet@...gle.com>
>>> Cc: Florian Fainelli <f.fainelli@...il.com>
>>> Cc: Heiner Kallweit <hkallweit1@...il.com>
>>> Cc: Jakub Kicinski <kuba@...nel.org>
>>> Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
>>> Cc: Michael Klein <michael@...sekall.de>
>>> Cc: Paolo Abeni <pabeni@...hat.com>
>>> Cc: Rob Herring <robh@...nel.org>
>>> Cc: Russell King <linux@...linux.org.uk>
>>> Cc: Vladimir Oltean <vladimir.oltean@....com>
>>> Cc: devicetree@...r.kernel.org
>>> Cc: netdev@...r.kernel.org
>>> ---
>>> drivers/net/phy/realtek/realtek_main.c | 47
>>> ++++++++++++++++++++++++++
>>> 1 file changed, 47 insertions(+)
>>>
>>> diff --git a/drivers/net/phy/realtek/realtek_main.c
>>> b/drivers/net/phy/realtek/realtek_main.c
>>> index 67ecf3d4af2b1..b1b48936d6422 100644
>>> --- a/drivers/net/phy/realtek/realtek_main.c
>>> +++ b/drivers/net/phy/realtek/realtek_main.c
>>> @@ -74,11 +74,17 @@
>>>
>>> #define RTL8211F_PHYCR2 0x19
>>> #define RTL8211F_CLKOUT_EN BIT(0)
>>> +#define RTL8211F_SYSCLK_SSC_EN BIT(3)
>>> #define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
>>>
>>> #define RTL8211F_INSR_PAGE 0xa43
>>> #define RTL8211F_INSR 0x1d
>>>
>>> +/* RTL8211F SSC settings */
>>> +#define RTL8211F_SSC_PAGE 0xc44
>>> +#define RTL8211F_SSC_RXC 0x13
>>> +#define RTL8211F_SSC_SYSCLK 0x17
>>> +
>>> /* RTL8211F LED configuration */
>>> #define RTL8211F_LEDCR_PAGE 0xd04
>>> #define RTL8211F_LEDCR 0x10
>>> @@ -203,6 +209,7 @@ MODULE_LICENSE("GPL");
>>> struct rtl821x_priv {
>>> bool enable_aldps;
>>> bool disable_clk_out;
>>> + bool enable_ssc;
>>> struct clk *clk;
>>> /* rtl8211f */
>>> u16 iner;
>>> @@ -266,6 +273,8 @@ static int rtl821x_probe(struct phy_device
>>> *phydev)
>>> "realtek,aldps-
>>> enable");
>>> priv->disable_clk_out = of_property_read_bool(dev->of_node,
>>>
>>> "realtek,clkout-disable");
>>> + priv->enable_ssc = of_property_read_bool(dev->of_node,
>>> + "realtek,ssc-
>>> enable");
>>>
>>> phydev->priv = priv;
>>>
>>> @@ -700,6 +709,37 @@ static int rtl8211f_config_phy_eee(struct
>>> phy_device *phydev)
>>> RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
>>> }
>>>
>>> +static int rtl8211f_config_ssc(struct phy_device *phydev)
>>> +{
>>> + struct rtl821x_priv *priv = phydev->priv;
>>> + struct device *dev = &phydev->mdio.dev;
>>> + int ret;
>>> +
>>> + /* The value is preserved if the device tree property is
>>> absent */
>>> + if (!priv->enable_ssc)
>>> + return 0;
>>> +
>>> + /* RTL8211FVD has no PHYCR2 register */
>>> + if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
>>> + return 0;
>>
>> Ivan, do your conversations with Realtek support suggest that the VFD
>> PHY variant also supports the spread spectrum clock bits configured
>> here
>> in RTL8211F_PHYCR2?
>>
>>
>>
>
> From what I learned from Realtek, the statement about RTL8211F(D)(I)-
> VD-CG not having PHYCR2 (Page 0xa43 Address 0x19) is incorrect. This
> register does exist and manages nearly identical configurations as the
> rest of the RTL8211F series, with the exception of the CLKOUT
> configuration, which has been relocated to a different control
> register. Marek, you can read about my findings here
> https://lore.kernel.org/netdev/20251202-phy_eee-v1-1-fe0bf6ab3df0@axis.com/
>
> Unfortunately I don't have the complete description of PHYCR2 on this
> particular PHY. I will reach out to Realtek regarding SSC and provide
> an update once I have more information.
I think the bits of interest are PHYCR2 bits 13:12 CLKOUT SSC
capability, 7 CLKOUT SSC Enable and 3 SYSCLK SSC Enable .
Thank you for this information.
I will send a patchset V2 shortly, with the split configuration that
follows EMI improvement parameters application note 1.2 and also sets
the bits in PHYCR2 accordingly .
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