netdev - [PATCH net-next] bnxt_en: Fix build break on non-x86 platforms

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Message-ID: <20260113183422.508851-1-michael.chan@broadcom.com>
Date: Tue, 13 Jan 2026 10:34:22 -0800
From: Michael Chan <michael.chan@...adcom.com>
To: davem@...emloft.net
Cc: netdev@...r.kernel.org,
	edumazet@...gle.com,
	kuba@...nel.org,
	pabeni@...hat.com,
	andrew+netdev@...n.ch,
	pavan.chebbi@...adcom.com,
	andrew.gospodarek@...adcom.com,
	sfr@...b.auug.org.au,
	kernel test robot <lkp@...el.com>
Subject: [PATCH net-next] bnxt_en: Fix build break on non-x86 platforms

From: Pavan Chebbi <pavan.chebbi@...adcom.com>

Commit c470195b989fe added .getcrosststamp() interface where
the code uses boot_cpu_has() function which is available only
in x86 platforms. This fails the build on any other platform.

Since the interface is going to be supported only on x86 anyway,
we can simply compile out the entire support on non-x86 platforms.

Cover the .getcrosststamp support under CONFIG_X86

Fixes: c470195b989f ("bnxt_en: Add PTP .getcrosststamp() interface to get device/host times")
Reported-by: kernel test robot <lkp@...el.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202601111808.WnBJCuWI-lkp@intel.com
Signed-off-by: Pavan Chebbi <pavan.chebbi@...adcom.com>
Signed-off-by: Michael Chan <michael.chan@...adcom.com>
---
 drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
index 75ad385f5f79..ad89c5fa9b40 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
@@ -882,6 +882,7 @@ void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi,
 	}
 }
 
+#ifdef CONFIG_X86
 static int bnxt_phc_get_syncdevicetime(ktime_t *device,
 				       struct system_counterval_t *system,
 				       void *ctx)
@@ -924,6 +925,7 @@ static int bnxt_ptp_getcrosststamp(struct ptp_clock_info *ptp_info,
 	return get_device_system_crosststamp(bnxt_phc_get_syncdevicetime,
 					     ptp, NULL, xtstamp);
 }
+#endif /* CONFIG_X86 */
 
 static const struct ptp_clock_info bnxt_ptp_caps = {
 	.owner		= THIS_MODULE,
@@ -1137,9 +1139,11 @@ int bnxt_ptp_init(struct bnxt *bp)
 		if (bnxt_ptp_pps_init(bp))
 			netdev_err(bp->dev, "1pps not initialized, continuing without 1pps support\n");
 	}
+#ifdef CONFIG_X86
 	if ((bp->fw_cap & BNXT_FW_CAP_PTP_PTM) && pcie_ptm_enabled(bp->pdev) &&
 	    boot_cpu_has(X86_FEATURE_ART))
 		ptp->ptp_info.getcrosststamp = bnxt_ptp_getcrosststamp;
+#endif /* CONFIG_X86 */
 
 	ptp->ptp_clock = ptp_clock_register(&ptp->ptp_info, &bp->pdev->dev);
 	if (IS_ERR(ptp->ptp_clock)) {
-- 
2.51.0