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Message-ID:
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Date: Thu, 29 Jan 2026 06:48:39 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: geert <geert@...ux-m68k.org>, biju.das.au <biju.das.au@...il.com>
CC: Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
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Subject: RE: [PATCH net-next 0/8] Add support for Renesas RZ/G3L GBETH
Hi Geert,
Thanks for the feedback
> -----Original Message-----
> From: Geert Uytterhoeven <geert@...ux-m68k.org>
> Sent: 28 January 2026 18:42
> Subject: Re: [PATCH net-next 0/8] Add support for Renesas RZ/G3L GBETH
>
> Hi Biju,
>
> On Wed, 28 Jan 2026 at 13:58, Biju <biju.das.au@...il.com> wrote:
> > From: Biju Das <biju.das.jz@...renesas.com>
> >
> > The Renesas RZ/G3L GBETH IP uses Synopsys DesignWare MAC version 5.30
> > compared to other Renesas SoC such as RZ/V2H that use MAC version 5.20.
> >
> > The RZ/G3L GBETH requires an extra clock compared to RZ/G3E and has
> > pps interrupts. Document the Renesas RZ/G3L GBETH IP in bindings and
> > enable the Gigabit Ethernet Interface (GBETH0) populated on the RZ/G3L
> > SMARC EVK. The eth1, pincontrol definitions and hotplug support will
> > be added later.
> >
> > Biju Das (8):
> > dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L SoC
> > net: stmmac: dwmac-renesas-gbeth: Add support for RZ/G3L SoC
> > clk: renesas: rzg2l: Drop a check in rzg3s_cpg_pll_clk_recalc_rate()
> > clk: renesas: rzg2l: Add support for enabling PLLs
> > clk: renesas: r8a08g046: Add support for PLL6 clk
> > clk: renesas: r9a08g046: Add clock and reset signals for the GBETH IPs
> > arm64: dts: renesas: r9a08g046: Add GBETH nodes
> > arm64: dts: renesas: rzg3l-smarc-som: Enable eth0 (GBETH) interface
>
> Thanks for your series!
>
> Please don't include "net-next" tags in patches that are not meant to be applied to the net-next tree.
My bad, I will split net-next patches separate and send it as v2.
Cheers,
Biju
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