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Date: Wed, 28 Aug 2013 14:50:38 +0100
From: Darren J Moffat <Darren.Moffat@...cle.COM>
Subject: Re: [PHC] The EARWORM password hash

On 08/12/13 18:32, Bitweasil . wrote:
> I really like the use of the AES intrinsic operations for performance.
>   Unfortunately, right now, this does seem to make the algorithm very
> x86-centric

SPARC had AES in hardware before Intel added it to their processors. 
Even VIA had hardware AES before Intel x86 CPUs.

For SPARC T2 through T3 it was a hyperprivileged co-processor but from 
Oracle SPARC T4 (S3 Core) onwards it is unprivileged userspace 
accessible instructions.

Also Unlike current shipping Intel processors, the currently shipping 
Oracle SPARC processors also have MD5, SHA1, SHA256, SHA512, DES and 
Camellia instructions.

The current shipping Fujitsu SPARC processors have AES and DES instructions.

Darren J Moffat

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