phc-discussions - RE: [PHC] Future CPUs and GPUs?

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <8b9927ef04fe4a37a7569de87d32641c@BY2PR03MB074.namprd03.prod.outlook.com>
Date: Sat, 1 Mar 2014 02:11:54 +0000
From: Marsh Ray <maray@...rosoft.com>
To: "discussions@...sword-hashing.net" <discussions@...sword-hashing.net>
Subject: RE: [PHC] Future CPUs and GPUs?

Just came across something interesting about the newly-opened Broadcom GPU:

Vvvvvvvvvvv https://news.ycombinator.com/item?id=7322071 vvvvvvvvvvvvvvvvv

peterderivaz 3 hours ago | link
The vector register file is a block of registers 64 bytes across by 64 down which can be accessed horizontally (H) or vertically (V), and in units of 16 bytes (H8), 16 shorts (H16 or HX), or 16 32-bit words (H32).
Each processor has an accumulator that can be cleared (CLRA) or used (ACC).
This code is basically equivalent to the following C code:
[...]
This is code for the vector processor. This is not the same as the GPU cores which use a different architecture and instruction set (based around floating point calculations).

^^^^^^^^^^^^^^^^^ end quote ^^^^^^^^^^^^^^^

Seems like it would be good for 2D rotates and transitions to-from bitslices as well.

Is this a feature of other GPUs?

- Marsh