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Message-ID: <20070706210351.GA13491@Krystal>
Date: Fri, 6 Jul 2007 17:03:51 -0400
From: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
To: "Li, Tong N" <tong.n.li@...el.com>
Cc: Andi Kleen <andi@...stfloor.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Alexey Dobriyan <adobriyan@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: [patch 10/10] Scheduler profiling - Use immediate values
* Li, Tong N (tong.n.li@...el.com) wrote:
> > I found that memory latency is difficult to measure in modern x86
> > CPUs because they have very clever prefetchers that can often
> > outwit benchmarks.
>
> A pointer-chasing program that accesses a random sequence of addresses
> usually can produce a good estimate on memory latency. Also, prefetching
> can be turned off in BIOS or by modifying the MSRs.
>
> > Another trap on P4 is that RDTSC is actually quite slow and
> synchronizes
> > the CPU; that can add large measurement errors.
> >
> > -Andi
>
> The cost can be amortized if the portion of memory accesses is long
> enough.
>
> tong
>
That's what I am currently doing.. the results are coming in a few
moments... :)
--
Mathieu Desnoyers
Computer Engineering Ph.D. Student, Ecole Polytechnique de Montreal
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
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