| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Sat, 8 Sep 2007 10:53:36 +0200 From: Andi Kleen <ak@...e.de> To: Nick Piggin <nickpiggin@...oo.com.au> Cc: Linus Torvalds <torvalds@...ux-foundation.org>, Jesse Barnes <jesse.barnes@...el.com>, linux-kernel@...r.kernel.org Subject: Re: Intel Memory Ordering White Paper On Friday 07 September 2007 20:13:12 Nick Piggin wrote: > On Sunday 09 September 2007 03:48, Nick Piggin wrote: > > > There is some suggestion in the source code that non-temporal stores > > (movntq) are weakly ordered. But AFAIKS from the documents, it is ordered > > when operating on wb memory. What's the situation there? > > Sorry, it looks from the AMD document like nontemporal stores to wb > memory can go out of order. Yes, that is how NT stores are defined. > If this is the case, we can either retain the sfence in smp_wmb(), or noop > it, and put explicit sfences around any place that performs nontemporal > stores... We do this already, but in most cases it doesn't matter anyways. We AFAIK do not rely on any ordering for copy_*_user for example. There are not that many users of nt so it's not a huge issue. > > Anyway, the lfence should be able to go away without so much trouble. You mean sfence? lfence in rmb is definitely needed. sfence on x86-64 is not strictly needed, but also shouldn't hurt very much so I always kept it in. -Andi - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists