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Message-ID: <20080416064630.22428aea@laptopd505.fenrus.org>
Date: Wed, 16 Apr 2008 06:46:30 -0700
From: Arjan van de Ven <arjan@...radead.org>
To: Ingo Molnar <mingo@...e.hu>
Cc: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
prasad@...ux.vnet.ibm.com, linux-kernel@...r.kernel.org,
tglx@...utronix.de, Christoph Hellwig <hch@...radead.org>,
"Frank Ch. Eigler" <fche@...hat.com>
Subject: Re: [RFC PATCH 1/2] Marker probes in futex.c
> > 4631: b0 00 mov $0x0,%al
> > 4633: 84 c0 test %al,%al
> > 4635: 0f 85 c6 00 00 00 jne 4701
the use of partial registers here is unfortunate and probably quite expensive ;(
> > If we want to support NMI context and have the ability to
> > instrument preemptable code without too much headache, we must
> > insure that every modification will leave the code in a "correct"
> > state and that we do not grow the size of any reachable
> > instruction. Also, we must insure gcc did not put code between
> > these instructions. Modifying non-relocatable instructions would
> > also be a pain, since we would have to deal with instruction
> > pointer relocation in the breakpoint code when the code
> > modification is being done.
you also need to make sure no cpu is executing that code ever..
but you already deal with that right?
> >
> > Luckily, gcc almost never place any code between the mov, test and
> > jne instructions. But since we cannot we sure, we could dynamically
> > check for this code pattern after the mov instruction. If we find
> > it, then we play with it as if it was a single asm block, but if we
> > don't find what we expect, then we use standard immediate values
> > for that. I expect the heavily optimised version will be usable
> > almost all the time.
I expect gcc to start using the macro-fusion capable ones more and more over time at least,
and for that the compare and jmp need to be consecutive.
--
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