linux-kernel - Re: [boot crash] Re: [tip:x86/mce3] x86, mce: use 64bit machine check code on 32bit

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Message-ID: <4A893746.4040402@linux.intel.com>
Date:	Mon, 17 Aug 2009 12:56:06 +0200
From:	Andi Kleen <ak@...ux.intel.com>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
CC:	Ingo Molnar <mingo@...e.hu>, linux-kernel@...r.kernel.org,
	mingo@...hat.com, hpa@...or.com, tglx@...utronix.de,
	Yinghai Lu <yinghai@...nel.org>,
	Huang Ying <ying.huang@...el.com>,
	"Rafael J. Wysocki" <rjw@...k.pl>,
	linux-tip-commits@...r.kernel.org
Subject: Re: [boot crash] Re: [tip:x86/mce3] x86, mce: use 64bit machine	check
 code on 32bit

Hidetoshi Seto wrote:
> One possibility is: if the BIOS doesn't clear status in banks,
> new mce codes will try to log such junks.
> If the junk is totally junk but can be decoded as a valid log with
> MISCV or ADDRV bit, and if the cpu try to access register which is
> not implemented (e.g. IA32_MCi_MISC/ADDR), then such access might
> cause a general protection exception. (ref. ASDM 3A 15.3.2.3)

The MCA declares if it comes with ADDR or MISC in a status bit
and the MCA code only accesses these MSRs if these status bits are set.
Also I believe P3 implemented ADDR at least, likely even MISC.

The old 32bit MCA code did that too

-Andi
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