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Message-Id: <1256533734.7117.45.camel@marge.simson.net>
Date: Mon, 26 Oct 2009 06:08:54 +0100
From: Mike Galbraith <efault@....de>
To: Arjan van de Ven <arjan@...radead.org>
Cc: Peter Zijlstra <peterz@...radead.org>, mingo@...e.hu,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] sched: Disable affine wakeups by default
On Sun, 2009-10-25 at 21:52 -0700, Arjan van de Ven wrote:
> On Mon, 26 Oct 2009 05:38:27 +0100
> Mike Galbraith <efault@....de> wrote:
>
> > On Mon, 2009-10-26 at 02:53 +0100, Peter Zijlstra wrote:
> > > On Sun, 2009-10-25 at 23:04 +0100, Mike Galbraith wrote:
> > > > if (want_affine && (tmp->flags & SD_WAKE_AFFINE)
> > > > &&
> > > > - cpumask_test_cpu(prev_cpu,
> > > > sched_domain_span(tmp))) {
> > > > + (level == SD_LV_SIBLING || level
> > > > == SD_LV_MC)) {
> > >
> > > quick comment without actually having looked at the patch, we should
> > > really get rid of sd->level and encode properties of the sched
> > > domains in sd->flags.
> >
> > Yeah, sounds right, while writing that, it looked kinda ugly. I
> > suppose arch land needs to encode cache property somehow if I really
> > want to be able to target cache on multicore. Booting becomes..
> > exciting when I tinker down there.
>
> or we just use SD_WAKE_AFFINE / SD_BALANCE_WAKE for this...
I don't see how. Oh, you mean another domain level, top level being
cache property, and turn off when degenerating? That looks like it'd be
a problem, but adding SD_CACHE_SIBLING or whatnot should work. Problem
is how to gain knowledge of whether multicores share a cache or not.
-Mike
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