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Message-ID: <1292865227-647466-3-git-send-email-hans.rosenfeld@amd.com> Date: Mon, 20 Dec 2010 18:13:45 +0100 From: Hans Rosenfeld <hans.rosenfeld@....com> To: <hpa@...or.com>, <tglx@...utronix.de>, <mingo@...e.hu> CC: <linux-kernel@...r.kernel.org>, <andreas.herrmann3@....com>, Hans Rosenfeld <hans.rosenfeld@....com> Subject: [PATCH 2/4] x86, amd: Enable L3 cache index disable on family 0x15 AMD family 0x15 CPUs support L3 cache index disable, so enable it on them. Signed-off-by: Hans Rosenfeld <hans.rosenfeld@....com> --- arch/x86/kernel/amd_nb.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index affacb5..4ce87c2 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -78,6 +78,9 @@ int amd_cache_northbridges(void) boot_cpu_data.x86_mask >= 0x1)) amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE; + if (boot_cpu_data.x86 == 0x15) + amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE; + return 0; } EXPORT_SYMBOL_GPL(amd_cache_northbridges); -- 1.5.6.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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