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Message-ID: <BANLkTim-2p1DgV1XD_J2vH514aL_KuFaEQ@mail.gmail.com>
Date: Tue, 21 Jun 2011 20:13:21 +0400
From: Cyrill Gorcunov <gorcunov@...nvz.org>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Cyrill Gorcunov <gorcunov@...nvz.org>,
Don Zickus <dzickus@...hat.com>, Ingo Molnar <mingo@...e.hu>,
Lin Ming <ming.m.lin@...el.com>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Stephane Eranian <eranian@...gle.com>,
Vince Weaver <vweaver1@...s.utk.edu>,
lkml <linux-kernel@...r.kernel.org>
Subject: Re: [RFC -tip] perf, x86: Add PERF_COUNT_HW_NMI_WATCHDOG event v2
Ok, I'll take a look (sorry for top posting, ISP problem)
On Tuesday, June 21, 2011, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> On Tue, 2011-06-21 at 19:40 +0400, Cyrill Gorcunov wrote:
>> On Tue, Jun 21, 2011 at 7:23 PM, Don Zickus <dzickus@...hat.com> wrote:
>> > On Thu, Apr 28, 2011 at 07:37:25PM +0400, Cyrill Gorcunov wrote:
>> >> Due to restriction and specifics of Netburst PMU we need a separated
>> >> event for NMI watchdog. In particular every Netburst event consume not
>> >> just a counter and config register, but also an additional ESCR register.
>> >> Since ESCR registers are grouped upon counters (i.e. if ESCR is occupied
>> >> for some event there is no room for another event to enter the room until
>> >> it's released) we need to pick up "least" used ESCR (or most available)
>> >> for nmi-watchdog purpose -- MSR_P4_CRU_ESCR2/3 was chosen.
>> >>
>> >> Note that on all other PMUs which support relocation of events between
>> >> counters this event is a simple alias for PERF_COUNT_HW_CPU_CYCLES.
>> >
>> > Cyril,
>> >
>> > What ever happened with this patch?
>> >
>> > Cheers,
>> > Don
>> >
>>
>> Well, it's flowing around, I didn't get any more Ack's other than your. Since it
>> introduces kind of abi I presume more ack's would be welcome before it
>> (possibly) get merged.
>
> we could avoid that abi thing by simply not making it an exposed event
>
> Its not like userspace ever should be using it anyway
>
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