linux-kernel - [x86] Fix prefetch instruction

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Message-ID: <alpine.DEB.2.00.1108051116520.28580@router.home>
Date:	Fri, 5 Aug 2011 11:18:24 -0500 (CDT)
From:	Christoph Lameter <cl@...ux.com>
To:	Ingo Molnar <mingo@...e.hu>
cc:	linux-kernel@...r.kernel.org, Andi Kleen <ak@...ux.intel.com>,
	"H. Peter Anvin" <hpa@...ux.intel.com>
Subject: [x86] Fix prefetch instruction

The prefetchnta instruction used for prefetching on x86 is a special instruction
used for streaming that is usually used to avoid polluting the l2 and l3 caches.
The cacheline will be evicted rapidly.

What we need is a prefetch that puts the cacheline in all levels of the cache hierachy instead.
Change the instruction to do that.

Acked-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Christoph Lameter <cl@...ux.com>


---
 arch/x86/include/asm/processor.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: linux-2.6/arch/x86/include/asm/processor.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/processor.h	2011-08-04 13:12:39.000000000 -0500
+++ linux-2.6/arch/x86/include/asm/processor.h	2011-08-04 13:16:31.000000000 -0500
@@ -829,7 +829,7 @@ extern char			ignore_fpu_irq;
 static inline void prefetch(const void *x)
 {
 	alternative_input(BASE_PREFETCH,
-			  "prefetchnta (%1)",
+			  "prefetcht0 (%1)",
 			  X86_FEATURE_XMM,
 			  "r" (x));
 }
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