linux-kernel - Re: [Patch] Idle balancer: cache align nohz structure to improve idle load balancing scalability

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Message-ID: <1319090264.14569.1.camel@sbsiddha-mobl2>
Date:	Wed, 19 Oct 2011 22:57:44 -0700
From:	Suresh Siddha <suresh.b.siddha@...el.com>
To:	Eric Dumazet <eric.dumazet@...il.com>
Cc:	Tim Chen <tim.c.chen@...ux.intel.com>, Ingo Molnar <mingo@...e.hu>,
	Peter Zijlstra <peterz@...radead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Andi Kleen <ak@...ux.intel.com>,
	Venki Pallipadi <venki@...gle.com>
Subject: Re: [Patch] Idle balancer: cache align nohz structure to improve
 idle load balancing scalability

On Wed, 2011-10-19 at 21:18 -0700, Eric Dumazet wrote:
> > +	atomic_t load_balancer ____cacheline_aligned;
> > +	atomic_t first_pick_cpu ____cacheline_aligned;
> > +	atomic_t second_pick_cpu ____cacheline_aligned;
> > +	cpumask_var_t idle_cpus_mask ____cacheline_aligned;
> >  	cpumask_var_t grp_idle_mask;
> >  	unsigned long next_balance;     /* in jiffy units */
> >  } nohz ____cacheline_aligned;
> > 
> 
> Dont you increase cache footprint, say for an Uniprocessor machine ?
> 
> (CONFIG_SMP=n)
> 
> ____cacheline_aligned_in_smp seems more suitable in this case.

I believe this code is already under ifdef CONFIG_SMP.

thanks,
suresh


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