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Message-ID: <20120607224303.GN28225@tassilo.jf.intel.com>
Date:	Thu, 7 Jun 2012 15:43:03 -0700
From:	Andi Kleen <ak@...ux.intel.com>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
	peterz@...radead.org, mingo@...e.hu
Subject: Re: [PATCH 1/2] perf, x86: Add basic Ivy Bridge support

> But as far as I know for the other generic stall event:
>                /* UOPS_DISPATCHED.THREAD,c=1,i=1 to count stall cycles*/
>                 intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =
>                         X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1);

Okay.  I'll just undefine it.

-Andi


-- 
ak@...ux.intel.com -- Speaking for myself only
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