linux-kernel - Re: [PATCH v3] lpc_ich: fix gpio base and control offsets

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Message-ID: <CACRpkdZHndQsDZpn7BCFNXAO3k5vREYxDJkcYQ3_3sTbKAQLLA@mail.gmail.com>
Date:	Fri, 25 Jan 2013 10:47:45 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Aaron Sierra <asierra@...-inc.com>,
	Paul Bolle <pebolle@...cali.nl>,
	Peter Hurley <peter@...leysoftware.com>
Cc:	Samuel Ortiz <sameo@...ux.intel.com>,
	Agócs Pál <agocs.pal.86@...il.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] lpc_ich: fix gpio base and control offsets

On Thu, Jan 24, 2013 at 9:52 PM, Aaron Sierra <asierra@...-inc.com> wrote:

> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
> offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
> properly be enabled (and disabled) for these chipsets.
>
> Signed-off-by: Agócs Pál <agocs.pal.86@...il.com>
> Signed-off-by: Aaron Sierra <asierra@...-inc.com>

OK... Paul, can you test this on your setup?

> @@ -858,14 +874,35 @@ wdt_done:
>  static int lpc_ich_probe(struct pci_dev *dev,
>                                 const struct pci_device_id *id)
>  {
> +       struct lpc_ich_priv *priv;
>         int ret;
>         bool cell_added = false;
>
> -       ret = lpc_ich_init_wdt(dev, id);
> +       priv = kmalloc(GFP_KERNEL, sizeof(struct lpc_ich_priv));
> +       if (!priv)
> +               return -ENOMEM;
> +
> +       priv->chipset = id->driver_data;

So where is this id->driver_data which is just assigned to
priv->chipset coming from again? ACPI something?

Just trying to follow things...

Yours,
Linus Walleij
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